Rainbow Electronics ATmega161L - Manual (Page 52)

52
ATmega161(L)
1228C–AVR–08/02
• Bits 1..0 – PWM11, PWM10: Pulse Width Modulator Select Bits
These bits select PWM operation of Timer/Counter1 as specified in Table 15. This mode
is described on page 55.
Timer/Counter1 Control
Register B – TCCR1B
• Bit 7 – ICNC1: Input Capture1 Noise Canceler (4 CKs)
When the ICNC1 bit is cleared (zero), the Input Capture trigger noise canceler function
is disabled. The Input Capture is triggered at the first rising/falling edge sampled on the
ICP (Input Capture pin) as specified. When the ICNC1 bit is set (one), four successive
samples are measured on the ICP (Input Capture pin), and all samples must be high/low
according to the Input Capture trigger specification in the ICES1 bit. The actual sampling
frequency is XTAL clock frequency.
• Bit 6 – ICES1: Input Capture1 Edge Select
While the ICES1 bit is cleared (zero), the Timer/Counter1 contents are transferred to the
Input Capture Register (ICR1) on the falling edge of the Input Capture pin (ICP). While
the ICES1 bit is set (one), the Timer/Counter1 contents are transferred to the Input Cap-
ture Register (ICR1) on the rising edge of the Input Capture pin (ICP).
• Bits 5, 4 – Res: Reserved Bits
These bits are reserved bits in the ATmega161 and always read as zero.
• Bit 3 – CTC1: Clear Timer/Counter1 on Compare Match
When the CTC1 control bit is set (one), the Timer/Counter1 is reset to $0000 in the clock
cycle after a compareA match. If the CTC1 control bit is cleared, Timer/Counter1 contin-
ues counting and is unaffected by a compare match. When a prescaling of 1 is used and
the Compare A Register is set to C, the timer will count as follows if CTC1 is set:
... | C-1 | C | 0 | 1 | ...
When the prescaler is set to divide by 8, the timer will count like this:
... | C-1, C-1, C-1, C-1, C-1, C-1, C-1, C-1 | C, C, C, C, C, C, C, C | 0, 0, 0, 0, 0, 0, 0, 0 | ...
In PWM mode, this bit has a different function. If the CTC1 bit is cleared in PWM mode,
the Timer/Counter1 acts as an up/down counter. If the CTC1 bit is set (one), the
Timer/Counter wraps when it reaches the TOP value. Refer to page 55 for a detailed
description.
Table 15. PWM Mode Select
PWM11 PWM10 Description
0 0 PWM operation of Timer/Counter1 is disabled.
0 1 Timer/Counter1 is an 8-bit PWM.
1 0 Timer/Counter1 is a 9-bit PWM.
1 1 Timer/Counter1 is a 10-bit PWM.
Bit 7 6 5 4 3 2 1 0
$2E ($4E) ICNC1 ICES1 – – CTC1 CS12 CS11 CS10 TCCR1B
Read/Write R/W R/W R R R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0