Rainbow Electronics ATmega161L - Manual (Page 136)

136
ATmega161(L)
1228C–AVR–08/02
Figure 83. External Memory Timing (SRWn1 = 0, SRWn0 = 0)
Figure 84. External Memory Timing (SRWn1 = 0, SRWn0 = 1)
ALE
WR
RD
Address [15..8] Address XX XX
Read
Data/Address [7..0] Address Data XX
Wr
ite
Data/Address [7..0] Address Data XX
System Clock Ø
T1 T2 T3 T4
1
4
2
7
6
3a
3b
5
8 12
16
13
15
9
10
11
14
Prev. addr.
XX Prev. data
XX Prev. data
ALE
WR
RD
Address [15..8] Address XX XX
Read
Data/Address [7..0] Address Data XX
Wr
ite
Data/Address [7..0] Address Data XX
T1 T2 T3 T5
1
4
2
7
6
3a
3b
5
8 12
16
13
15
9
10
11
14
Prev. addr.
XX Prev. data
XX Prev. data
System Clock Ø
T4