Program memory lock bits, Fuse bits, Atmega161(l) – Rainbow Electronics ATmega161L User Manual
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ATmega161(L)
1228C–AVR–08/02
Program Memory
Lock bits
The ATmega161 MCU provides six Lock bits that can be left unprogrammed (“1”) or can
be programmed (“0”) to obtain the additional features listed in Table 40. The Lock bits
can only be erased to “1” with the Chip Erase command.
Note:
1. Program the Fuse bits before programming the Lock bits.
Fuse bits
The ATmega161 has six Fuse bits: BOOTRST, SPIEN, SUT, and CKSEL [2:0].
•
When BOOTRST is programmed (“0”), the Reset Vector is set to address $1E00,
which is the first address location in the Boot Loader section of the Flash. If the
BOOTRST is unprogrammed (“1”), the Reset Vector is set to address $0000.
Default value is unprogrammed (“1”).
•
When the SPIEN Fuse is programmed (“0”), Serial Program and Data Downloading
is enabled. Default value is programmed (“0”). The SPIEN Fuse is not accessible in
Serial Programming mode.
•
The SUT Fuse changes the start-up times. Default value is unprogrammed (“1”).
Table 40. Lock Bit Protection Modes
(1)
Memory Lock bits
Protection Type
LB Mode
LB1
LB2
1
1
1
No memory lock features enabled
2
0
1
Further programming of the Flash and EEPROM is
disabled in parallel and Serial Programming modes. The
Fuse bits are locked in both Serial and Parallel
Programming modes.
(1)
3
0
0
Further programming and verification of the Flash and
EEPROM is disabled in parallel and Serial Programming
modes. The Fuse bits are locked in both Serial and
Parallel Programming modes.
(1)
BLB0 Mode
BLB02
BLB01
1
1
1
No restrictions for SPM, LPM accessing the Application
Code section
2
1
0
SPM is not allowed to write to the Application Code
section.
3
0
0
SPM is not allowed to write to the Application Code
section and LPM executing from Boot Loader section is
not allowed to read from the Application Code section.
4
0
1
LPM executing from the Boot Loader section is not
allowed to read from the Application Code section.
BLB1 Mode
BLB12
BLB11
1
1
1
No restrictions for SPM, LPM accessing the Boot Loader
section
2
1
0
SPM is not allowed to write the Boot Loader section.
3
0
0
SPM is not allowed to write to the Boot Loader section and
LPM executing from the Application Code section is not
allowed to read from the Boot Loader section.
4
0
1
LPM executing from the Application Code section is not
allowed to read from the Boot Loader section.