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Power-on reset, Atmega161(l) – Rainbow Electronics ATmega161L User Manual

Page 27

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ATmega161(L)

1228C–AVR–08/02

Power-on Reset

A Power-on Reset (POR) pulse is generated by an On-chip detection circuit. The detec-
tion level is nominally 1.4V (rising V

CC

). The POR is activated whenever V

CC

is below

the detection level. The POR circuit can be used to trigger the Start-up Reset, as well as
detect a failure in supply voltage.

A Power-on Reset (POR) circuit ensures that the device is reset from Power-on. Reach-
ing the Power-on Reset threshold voltage invokes a delay counter, which determines
the delay, for which the device is kept in RESET after V

CC

rise. The time-out period of

the delay counter can be defined by the user through the CKSEL fuses. The eight differ-
ent selections for the delay period are presented in Table 4. The RESET signal is
activated again, without any delay, when the V

CC

decreases below detection level.

Figure 25. MCU Start-up, RESET Tied to V

CC

Figure 26. MCU Start-up, RESET Controlled Externally

VCC

RESET

TIME-OUT

INTERNAL

RESET

t

TOUT

V

POT

V

RST

VCC

RESET

TIME-OUT

INTERNAL

RESET

t

TOUT

V

POT

V

RST