Rainbow Electronics ATmega161L - Manual (Page 115)

115
ATmega161(L)
1228C–AVR–08/02
EEPROM Write Prevents
Writing to SPMCR Note that an EEPROM write operation will block all software programming to Flash.
Reading the Fuse and Lock bits from software will also be prevented during the
EEPROM write operation. It is recommended that the user check the status bit (EEWE)
in the EECR Register and verify that the bit is cleared before writing to the SPMCR
Register.
Reading the Fuse and Lock
bits from Software It is possible to read both the Fuse and Lock bits from software. To read the Lock bits,
load the Z-pointer with $0001 and set the BLBSET and SPMEN bits in SPMCR. If an
LPM instruction is executed within three CPU cycles after the BLBSET and SPMEN bits
are set in SPMCR, the Lock bits will be written to the destination register. The BLBSET
and SPMEN bits will auto-clear upon completion of reading the Lock bits or if no
LPM/SPM instruction is executed within three/four CPU cycles. When BLBSET and
SPMEN are cleared, LPM will work as described in “Constant Addressing Using the
LPM Instruction” on page 16 and in the Instruction Set manual.
The algorithm for reading the Fuse bits is similar to the one described above for reading
the Lock bits. But when reading the Fuse bits, load $0000 in the Z-pointer. When an
LPM instruction is executed within three cycles after the BLBSET and SPMEN bits are
set in the SPMCR, the Fuse bits can be read in the destination register as shown below.
Fuse and Lock bits that are programmed will be read as zero.
Bit 7 6 5 4 3 2 1 0
– – BLB12 BLB11 BLB02 BLB01 LB2 LB1 R0/Rd
Bit 7 6 5 4 3 2 1 0
– BOOTRST SPIEN SUT – CKSEL[2] CKSEL[1] CKSEL[0] R0/Rd