Rainbow Electronics ATmega162V - Manual (Page 258)

258
ATmega162/V
2513E–AVR–09/03
Figure 111. Virtual Flash Page Load Register
Virtual Flash Page Read
Register The Virtual Flash Page Read Register is a virtual scan chain with length equal to the
number of bits in one Flash page plus eight. Internally the Shift Register is 8-bit, and the
data are automatically transferred from the Flash data page byte-by-byte. The first eight
cycles are used to transfer the first byte to the internal Shift Register, and the bits that
are shifted out during these right cycles should be ignored. Following this initialization,
data are shifted out starting with the LSB of the first instruction in the page and ending
with the MSB of the last instruction in the page. This provides an efficient way to read
one full Flash page to verify programming.
TDI
TDO
D
A
T
A
Flash
EEPROM
Fuses
Lock Bits
STROBES
ADDRESS
State
Machine