Atmega162/v – Rainbow Electronics ATmega162V User Manual
Page 136

136
ATmega162/V
2513E–AVR–09/03
Extended Timer/Counter
Interrupt Flag Register –
ETIFR
Note:
1. This register contains flag bits for several Timer/Counters, but only Timer3 bits are
described in this section. The remaining bits are described in their respective Timer
sections.
• Bit 5 – ICF3: Timer/Counter3, Input Capture Flag
This flag is set when a capture event occurs on the ICP3 pin. When the Input Capture
Register (ICR3) is set by the WGMn3:0 to be used as the TOP value, the ICF3 Flag is
set when the counter reaches the TOP value.
ICF3 is automatically cleared when the Input Capture Interrupt Vector is executed. Alter-
natively, ICF3 can be cleared by writing a logic one to its bit location.
• Bit 4 – OCF3A: Timer/Counter3, Output Compare A Match Flag
This flag is set in the timer clock cycle after the counter (TCNT3) value matches the Out-
put Compare Register A (OCR3A).
Note that a Forced Output Compare (FOC3A) strobe will not set the OCF3A Flag.
OCF3A is automatically cleared when the Output Compare Match A Interrupt Vector is
executed. Alternatively, OCF3A can be cleared by writing a logic one to its bit location.
• Bit 3 – OCF3B: Timer/Counter3, Output Compare B Match Flag
This flag is set in the timer clock cycle after the counter (TCNT3) value matches the Out-
put Compare Register B (OCR3B).
Note that a Forced Output Compare (FOC3B) strobe will not set the OCF3B Flag.
OCF3B is automatically cleared when the Output Compare Match B Interrupt Vector is
executed. Alternatively, OCF3B can be cleared by writing a logic one to its bit location.
• Bit 2 – TOV3: Timer/Counter3, Overflow Flag
The setting of this flag is dependent of the WGMn3:0 bits setting. In normal and CTC
modes, the TOV3 Flag is set when the timer overflows. Refer to Table 56 on page 129
for the TOV3 Flag behavior when using another WGMn3:0 bit setting.
TOV3 is automatically cleared when the Timer/Counter3 Overflow Interrupt Vector is
executed. Alternatively, TOV3 can be cleared by writing a logic one to its bit location.
Bit
7
6
5
4
3
2
1
0
ICF3
OCF3A
OC3FB
TOV3
–
–
ETIFR
Read/Write
R
R
R/W
R/W
R/W
R/W
R
R
Initial Value
0
0
0
0
0
0
0
0