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Bit timer/counter register description, Timer/counter1 control register a – tccr1a, Timer/counter3 control register a – tccr3a – Rainbow Electronics ATmega162V User Manual

Page 127: Table 53, Atmega162/v, Table 53. compare output mode, non-pwm

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127

ATmega162/V

2513E–AVR–09/03

16-bit Timer/Counter
Register Description

Timer/Counter1 Control
Register A – TCCR1A

Timer/Counter3 Control
Register A – TCCR3A

• Bit 7:6 – COMnA1:0: Compare Output Mode for channel A

• Bit 5:4 – COMnB1:0: Compare Output Mode for channel B

The COMnA1:0 and COMnB1:0 control the Output Compare pins (OCnA and OCnB
respectively) behavior. If one or both of the COMnA1:0 bits are written to one, the OCnA
output overrides the normal port functionality of the I/O pin it is connected to. If one or
both of the COMnB1:0 bit are written to one, the OCnB output overrides the normal port
functionality of the I/O pin it is connected to. However, note that the Data Direction Reg-
ister
(DDR) bit corresponding to the OCnA or OCnB pin must be set in order to enable
the output driver.

When the OCnA or OCnB is connected to the pin, the function of the COMnx1:0 bits is
dependent of the WGMn3:0 bits setting. Table 53 shows the COMnx1:0 bit functionality
when the WGMn3:0 bits are set to a normal or a CTC mode (non-PWM).

Bit

7

6

5

4

3

2

1

0

COM1A1

COM1A0

COM1B1

COM1B0

FOC1A

FOC1B

WGM11

WGM10

TCCR1A

Read/Write

R/W

R/W

R/W

R/W

W

W

R/W

R/W

Initial Value

0

0

0

0

0

0

0

0

Bit

7

6

5

4

3

2

1

0

COM3A1

COM3A0

COM3B1

COM3B0

FOC3A

FOC3B

WGM31

WGM30

TCCR3A

Read/Write

R/W

R/W

R/W

R/W

W

W

R/W

R/W

Initial Value

0

0

0

0

0

0

0

0

Table 53. Compare Output Mode, non-PWM

COMnA1/

COMnB1

COMnA0/

COMnB0

Description

0

0

Normal port operation, OCnA/OCnB disconnected.

0

1

Toggle OCnA/OCnB on Compare Match.

1

0

Clear OCnA/OCnB on Compare Match (Set output to low level).

1

1

Set OCnA/OCnB on Compare Match (Set output to high level).