Timer/counter1 - tcnt1h and tcnt1l – Rainbow Electronics ATmega103L User Manual
Page 47
ATmega603/103
47
Timer/Counter1 - TCNT1H and TCNT1L
This 16-bit register contains the prescaled value of the 16-bit Timer/Counter1. To ensure that both the high and low bytes
are read and written simultaneously when the CPU accesses these registers, the access is performed using an 8-bit tem-
porary register (TEMP). This temporary register is also used when accessing OCR1A, OCR1B and ICR1. If the main
program and also interrupt routines perform access to registers using TEMP, interrupts must be disabled during access
from the main program (and from interrupt routines if interrupts are allowed from within interrupt routines).
• TCNT1 Timer/Counter1 Write:
When the CPU writes to the high byte TCNT1H, the written data is placed in the TEMP register. Next, when the CPU
writes the low byte TCNT1L, this byte of data is combined with the byte data in the TEMP register, and all 16 bits are
written to the TCNT1 Timer/Counter1 register simultaneously. Consequently, the high byte TCNT1H must be accessed
first for a full 16-bit register write operation. When using Timer/Counter1 as an 8-bit timer, it is sufficient to write the low
byte only.
• TCNT1 Timer/Counter1 Read:
When the CPU reads the low byte TCNT1L, the data of TCNT1L is sent to the CPU and the data of the high byte
TCNT1H is placed in the TEMP register. When the CPU reads the data in the high byte TCNT1H, the CPU receives the
data in the TEMP register. Consequently, the low byte TCNT1L must be accessed first for a full 16-bit register read
operation. When using Timer/counter1 as an 8-bit timer, it is sufficient to read the low byte only.
The Timer/Counter1 is realized as an up or up/down (in PWM mode) counter with read and write access. If Timer/Counter1
is written to and a clock source is selected, the Timer/Counter1 continues counting in the clock cycle after it is preset with
the written value.
Bit
15
14
13
12
11
10
9
8
$2D ($4D)
MSB
TCNT1H
$2C ($4C)
LSB
TCNT1L
7
6
5
4
3
2
1
0
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0