Rainbow Electronics DS21458 - Manual (Page 266)

DS21455/DS21458 Quad T1/E1/J1 Transceivers
266 of 270
Figure 38-13. Transmit Side Timing
4) TCHCLK and TCHBLK are synchronous with TCLK when the transmit-side elastic store is disabled.
NOTES:
1) TSYNC is in the output mode (TCR2.2 = 1).
2) TSYNC is in the input mode (TCR2.2 = 0).
3) TSER is sampled on the falling edge of TCLK when the transmit-side elastic store is disabled.
5) TLINK is only sampled during F-bit locations.
6) No relationship between TCHCLK and TCHBLK and the other signals is implied.
t
F
t
R
1
TCLK
TSER / TSIG /
TDATA
TCHCLK
t
t
CL
t
CH
CP
TSYNC
TSYNC
TLINK
TLCLK
TCHBLK
t
D2
tD2
t
D2
t
t
t
t
t
t
HD
SU
D2
SU
HD
D1
tHD
2
5
TESO
tSU