Test registers, Boundary scan register, Bypass register – Rainbow Electronics DS21458 User Manual
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DS21455/DS21458 Quad T1/E1/J1 Transceivers
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35.2 Test Registers
IEEE 1149.1 requires a minimum of two test registers: the bypass register and the boundary scan register.
An optional test register has been included with the DS21455/DS21458 design. This test register is the
identification register and is used with the IDCODE instruction and the test-logic-reset state of the TAP
controller.
35.3 Boundary Scan Register
This register contains both a shift register path and a latched parallel output for all control cells and
digital I/O cells and is n bits in length. See
for the cell bit locations and definitions.
35.4 Bypass Register
This is a single 1-bit shift register used with the BYPASS, CLAMP, and HIGH-Z instructions that
provides a short path between JTDI and JTDO.
35.5 Identification Register
The identification register contains a 32-bit shift register and a 32-bit latched parallel output. This register
is selected during the IDCODE instruction and when the TAP controller is in the test-logic-reset state.
See
for more information about bit usage.