Rainbow Electronics DS21458 - Manual (Page 164)

DS21455/DS21458 Quad T1/E1/J1 Transceivers
164 of 270
25.7 LIU Control Registers
Register Name:
LIC1
Register Description: Line Interface Control 1
Register Address: 78h
Bit
# 7 6 5 4 3 2 1 0
Name L2 L1 L0 EGL JAS JABDS DJA TPD
Default 0 0 0 0 0 0 0 0
Bit 0/Transmit Power-Down (TPD). This bit along with the LIUC/TPD pin and the LTS (LBCR.7) bit controls the transmit
power-down function.
0 = powers down the transmitter and tri-states the TTIP and TRING pins
1 = normal transmitter operation
Table 25-1. TPD CONTROL
LBCR.7
(LTS)
LIUC/TPD
PIN
LIC1.0
(TPD)
FUNCTION
0 X 0 Transmitter in power-down mode, TTIP and TRING tri-stated
0 X 1 Transmitter enabled
1 0 0 Transmitter in power-down mode, TTIP and TRING tri-stated
1 0 1 Transmitter enabled
1 1 0 Transmitter in power-down mode, TTIP and TRING tri-stated
1 1 1 Transmitter in power-down mode, TTIP and TRING tri-stated
Bit 1/Disable Jitter Attenuator (DJA).
0 = jitter attenuator enabled
1 = jitter attenuator disabled
Bit 2/Jitter Attenuator Buffer Depth Select (JABDS).
0 = 128 bits
1 = 32 bits (use for delay sensitive applications)
Bit 3/Jitter Attenuator Select (JAS).
0 = place the jitter attenuator on the receive side
1 = place the jitter attenuator on the transmit side
Bit 4/Receive Equalizer Gain Limit (EGL). This bit controls the sensitivity of the receive equalizer.
T1 Mode: 0 = -36dB (long haul)
1 = -15dB (limited long haul)
E1 Mode: 0 = -12dB (short haul)
1 = -43dB (long haul)
Bits 5 to 7/Line Build-Out Select (L0 to L2). These bits select the output waveshape. See
Table 25-2 , Table 25-3 , Table
25-4 , and Table 25-5 for the correct register settings for specific applications. In E1 mode, when using the internal termination,
the user needs only to select 000 for 75Ω operation or 001 for 120Ω operation. Using TT0 and TT1 of the LICR4 register,
users can then select the proper internal source termination. Line build-outs 100 and 101 are provided for backward
compatibility with older products only.