Rainbow Electronics DS21458 - Manual (Page 187)

DS21455/DS21458 Quad T1/E1/J1 Transceivers
187 of 270
27.1 BERT Register Description
Register Name:
BC1
Register Description: BERT Control Register 1
Register Address: E0h
Bit
# 7 6 5 4 3 2 1 0
Name TC TINV RINV PS2 PS1 PS0 LC RESYNC
Default 0 0 0 0 0 0 0 0
Bit 0/Force Resynchronization (RESYNC). A low-to-high transition will force the receive BERT synchronizer to
resynchronize to the incoming data stream. This bit should be toggled from low to high whenever the host wishes to acquire
synchronization on a new pattern. Must be cleared and set again for a subsequent resynchronization.
Bit 1/Load Bit and Error Counters (LC). A low-to-high transition latches the current bit and error counts into the registers
BBC1/BBC2/BBC3/BBC4 and BEC1/BEC2/BEC3 and clears the internal count. This bit should be toggled from low to high
whenever the host wishes to begin a new acquisition period. Must be cleared and set again for a subsequent loads.
Bits 2 to 4/Pattern Select Bits (PS0 to PS2)
PS2 PS1 PS0 PATTERN DEFINITION
0 0 0 Pseudorandom 2E7–1
0 0 1 Pseudorandom 2E11–1
0 1 0 Pseudorandom 2E15–1
0 1 1
Pseudorandom Pattern QRSS. A 2 20 - 1 pattern with 14 consecutive
zero restriction.
1 0 0 Repetitive Pattern
1 0 1 Alternating Word Pattern
1 1 0
Modified 55 Octet (Daly) Pattern The Daly pattern is a repeating 55
octet pattern that is byte-aligned into the active DS0 time slots. The
pattern is defined in an ATIS (Alliance for Telecommunications
Industry Solutions) Committee T1 Technical Report Number 25
(November 1993).
1 1 1 Pseudorandom 2E9 - 1
Bit 5/Receive Invert Data Enable (RINV).
0 = do not invert the incoming data stream
1 = invert the incoming data stream
Bit 6/Transmit Invert Data Enable (TINV).
0 = do not invert the outgoing data stream
1 = invert the outgoing data stream
Bit 7/Transmit Pattern Load (TC). A low-to-high transition loads the pattern generator with the pattern that is to be
generated. This bit should be toggled from low to high whenever the host wishes to load a new pattern. Must be cleared and set
again for a subsequent loads.