Texas Instruments TMS320TCI648x User Manual
Page 250
SRIO Registers
in SRIO component block diagram
port multicast-event control symbol request registers
PID register
port n error capture
pins/differential signals
control information field
PKT_RESP_TIMEOUT_ENABLE field of ERR_EN
packet header bytes 0 to 3 field
PKT_RSPNS_TIMEOUT field of ERR_DET
packet header bytes 4 to 7 field
PKT_UNEXPECTED_ACKID_EN field of SPn_RATE_EN
packet header bytes 8 to 11 field
PKT_UNEXPECTED_ACKID field of SPn_ERR_DET
packet header bytes 12 to 15 field
type of error field
PLL block for SERDES
type of information field
PLL enable bit
valid information field
PLL multiply field for SERDES macro
port reset option CSR
PLL output clock frequency versus line rate
port response time-out control CSR
pointer to the next block in the data structure
ports
polarity inversion bit
enable bits
for RIORX and RIORX (reception)
enable status bits
for RIOTX and RIOTX (transmission)
in SRIO component block diagram
port 0 enable status bit
port silence timer registers
port 1 enable status bits
port-write error reporting disable field
port 2 enable status bits
port-write generation support for destination device
port 3 enable status bits
port-write generation support for source device
PORT_DISABLE field of SPn_CTL
port-write-in capture CSR
PORT_ERROR field of SPn_ERR_STAT
port-write-in capture payload
PORT_ID field of SPn_RST_OPT
port-write-in interrupt enable field
port_id field of TX buffer descriptor
port-write-in interrupt status field
PORT_LOCKOUT field of SPn_CTL
port-write maintenance operation
PORT_OK field of SPn_ERR_STAT
port-write pending status field
PORT_TYPE field of SPn_CTL
port-write repeat period field
PORT_UNINITIALIZED field of SPn_ERR_STAT
port-write request port ID
PORT_WIDTH_OVERRIDE field of SPn_CTL
port-write target device ID CSR
PORT_WIDTH field of SPn_CTL
posted WRITE operations during direct I/O transmission
PORT_WRITE_PND field of SPn_ERR_STAT
PORT_WRITE field of DEST_OP
power down state
PORT_WRITE field of SRC_OP
CPPI module
port attributes error capture CSR 0
Load/Store module
port control CSR
PRESCALE field of IP_PRESCAL
port control independent register
PRESCALER_SELECT field of PER_SET_CNTL
port control symbol transmit registers
pri field of RX buffer descriptor
port error and status CSR
pri field of TX buffer descriptor
port error capture CSR 1
priority arbiter for single-port transmission
port error capture CSR 2
PRIORITY field of LSUn_REG4
port error capture CSR 3
priority of doorbell packets
port error capture CSR 4
priority transmit credit thresholds
port error detect CSR
processing element features CAR
port error rate CSR
processing element logical layer control CSR
port error rate enable CSR
PROCESSOR field of PE_FEAT
port error rate threshold CSR
processor present field
port general control CSR
PROMISCUOUS field of RXU_MAP_Hn
port ID field for port-write request at port n
description
port IP discovery timer for 4x mode register
introduction
port IP mode CSR
PROTOCOL_ERROR_EN field of SPn_RATE_EN
port IP prescaler register
PROTOCOL_ERROR field of SPn_ERR_DET
port link maintenance request CSR
PW_CAPT0 field of SP_IP_PW_IN_CAPT0
port link maintenance response CSR
PW_CAPT1 field of SP_IP_PW_IN_CAPT1
port link time-out control CSR
PW_CAPT2 field of SP_IP_PW_IN_CAPT2
port local ackID status CSR
PW_CAPT3 field of SP_IP_PW_IN_CAPT3
250
Index
SPRUE13A – September 2006