Texas Instruments TMS320TCI648x - Manual (Page 214)

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5.77 Logical/Transport Layer High Address Capture CSR (H_ADDR_CAPT)
SRIO Registers
The logical/transport layer high address capture CSR (H_ADDR_CAPT) is shown in Figure 140 and
described in Table 153 .
Figure 140. Logical/Transport Layer High Address Capture CSR (H_ADDR_CAPT) - Address Offset
2010h
31 0
ADDRESS_63_32
R-00000000h
LEGEND: R = Read only; -n = Value after reset
Table 153. Logical/Transport Layer High Address Capture CSR (H_ADDR_CAPT) Field Descriptions
Bit Field Value Description
31–0 ADDRESS_63_32 00000000h Most significant 32 bits of the address associated with the error (only
to valid for devices supporting 66-bit and 50-bit addresses)
FFFFFFFFh
Serial RapidIO (SRIO) 214 SPRUE13A – September 2006
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