Texas Instruments TMS320TCI648x - Manual (Page 244)

SRIO Registers
DEV_INFO 183 doorbell interrupt condition status registers 132
DEVICE_VENDORIDENTITY field of DEV_ID 182 DOORBELLn_ICCR 133
DEVICEID_MSB field of PW_TGT_ID 218 DOORBELLn_ICRR 144
DEVICEID_REG1 121 DOORBELLn_ICRR2 144
DEVICEID_REG2 122 DOORBELLn_ICSR 132
device ID capture CSR for logical/transport errors 216 doorbell operation 63
device identity CAR 182 doorbell packets
DEVICEIDENTITY field of DEV_ID 182 Ftype and Ttype 25
DEVICEID field of PW_TGT_ID 218 packet header 64
device IDs priority 64
base device ID for host PE 194 used to cause CPU interrupts 85
base device ID for large common transport system doorbell-retry response during direct I/O reception 42
193 doorbell support for destination device 189
base device ID for small common transport system
doorbell support for source device 188
193
DRBLL_INFO field of LSUn_REG5 160
device ID for port-write target 218
drop packet enable for port n 207
disable base ID match requirement field for ports 231 DSP address field for LSUn 157
flow control destination ID size field 181
lower boundary for packet forwarding E
8-bit IDs 124 EF_ID field of ERR_RPT_BH 209
16-bit IDs 123 EF_ID field of SP_MB_HEAD 196
node ID field to compare to incoming destination ID EF_PTR field of ERR_RPT_BH 209
122 EF_PTR field of SP_MB_HEAD 196
node ID field to supply outgoing source ID 121 emulation 74
size selection field for LSUn 159 EN_STAT field of BLKn_EN_STAT 120
upper boundary for packet forwarding enable and enable status registers 71
8-bit IDs 124 enable bit(s)
16-bit IDs 123 for access to read-only registers during boot loading
device information CAR 183 113
device revision field 183 for adaptive equalizer 125
device type field 182 for entire SRIO peripheral 116
device wakeup after bootloading 80 for fixed-phase transmit clocking 128
differential signals/pins 25 for flow control 112
direct I/O for logical blocks 119
data path description 39 for port idle error checking 231
introduction 35 for port illegal-transfer error reporting 237
RX operation 42 for port multicast-event interrupt 231
TX operation 40
for port n 207
disable error checking for port n 207
for port reset interrupt 232
disable port n 207
for port self-reset interrupt 231
DISCOVERED field of SP_GEN_CTL 199
for port-write error reporting 231
DISCOVERY_TIMER field of
for port-write-in interrupt 232
SP_IP_DISCOVERY_TIMER 230
for SERDES PLLs 115, 131
DMA bus
for SERDES receivers 126
considerations regarding CPU interrupts 85
for SERDES transmitters 129
in data path description for LSUs 39
enable input only for port n 207
in direct I/O RX operation 42
enable multicast-event participation for port n 207
in Load/Store module data flow diagram 39
enable output only for port n 207
in message passing 43
enable status bit(s)
in SRIO component block diagram 26
for entire SRIO peripheral 117
DMA clock frequency as variable in clock prescaling
for logical blocks 0 through 8 117, 120
233
endianness 68
DMA error status bit for MAU 211
EN field of BLKn_EN 119
doorbell information field for LSUn 160
EN field of GBL_EN 116
doorbell interrupt condition clear registers 133
ENFTP field of SERDES_CFGTXn_CNTL 128
doorbell interrupt condition routing registers 144
ENPLL1 field of PER_SET_CNTL 113
244 Index SPRUE13A – September 2006
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