Texas Instruments TMS320TCI648x User Manual
Page 151
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SRIO Registers
Table 84. Interrupt Status Decode Register (INTDSTn_DECODE) Field Descriptions (continued)
Bit
Field
Value
Description
27
ISD27
0
No interrupt request routed to this bit.
1
Interrupt request detected. Possible interrupt sources:
•
TX buffer descriptor queue 4 (bit 4 of TX_CPPI_ICSR)
•
RX buffer descriptor queue 4 (bit 4 of RX_CPPI_ICSR)
26
ISD26
0
No interrupt request routed to this bit.
1
Interrupt request detected. Possible interrupt sources:
•
TX buffer descriptor queue 5 (bit 5 of TX_CPPI_ICSR)
•
RX buffer descriptor queue 5 (bit 5 of RX_CPPI_ICSR)
25
ISD25
0
No interrupt request routed to this bit.
1
Interrupt request detected. Possible interrupt sources:
•
TX buffer descriptor queue 6 (bit 6 of TX_CPPI_ICSR)
•
RX buffer descriptor queue 6 (bit 6 of RX_CPPI_ICSR)
24
ISD24
0
No interrupt request routed to this bit.
1
Interrupt request detected. Possible interrupt sources:
•
TX buffer descriptor queue 7 (bit 7 of TX_CPPI_ICSR)
•
RX buffer descriptor queue 7 (bit 7 of RX_CPPI_ICSR)
23
ISD23
0
No interrupt request routed to this bit.
1
Interrupt request detected. Possible interrupt sources:
•
TX buffer descriptor queue 8 (bit 8 of TX_CPPI_ICSR)
•
RX buffer descriptor queue 8 (bit 8 of RX_CPPI_ICSR)
22
ISD22
0
No interrupt request routed to this bit.
1
Interrupt request detected. Possible interrupt sources:
•
TX buffer descriptor queue 9 (bit 9 of TX_CPPI_ICSR)
•
RX buffer descriptor queue 9 (bit 9 of RX_CPPI_ICSR)
21
ISD21
0
No interrupt request routed to this bit.
1
Interrupt request detected. Possible interrupt sources:
•
TX buffer descriptor queue 10 (bit 10 of TX_CPPI_ICSR)
•
RX buffer descriptor queue 10 (bit 10 of RX_CPPI_ICSR)
20
ISD20
0
No interrupt request routed to this bit.
1
Interrupt request detected. Possible interrupt sources:
•
TX buffer descriptor queue 11 (bit 11 of TX_CPPI_ICSR)
•
RX buffer descriptor queue 11 (bit 11 of RX_CPPI_ICSR)
19
ISD19
0
No interrupt request routed to this bit.
1
Interrupt request detected. Possible interrupt sources:
•
TX buffer descriptor queue 12 (bit 12 of TX_CPPI_ICSR)
•
RX buffer descriptor queue 12 (bit 12 of RX_CPPI_ICSR)
18
ISD18
0
No interrupt request routed to this bit.
1
Interrupt request detected. Possible interrupt sources:
•
TX buffer descriptor queue 13 (bit 13 of TX_CPPI_ICSR)
•
RX buffer descriptor queue 13 (bit 13 of RX_CPPI_ICSR)
17
ISD17
0
No interrupt request routed to this bit.
1
Interrupt request detected. Possible interrupt sources:
•
TX buffer descriptor queue 14 (bit 14 of TX_CPPI_ICSR)
•
RX buffer descriptor queue 14 (bit 14 of RX_CPPI_ICSR)
16
ISD16
0
No interrupt request routed to this bit.
1
Interrupt request detected. Possible interrupt sources:
•
TX buffer descriptor queue 15 (bit 15 of TX_CPPI_ICSR)
•
RX buffer descriptor queue 15 (bit 15 of RX_CPPI_ICSR)
SPRUE13A – September 2006
Serial RapidIO (SRIO)
151