Texas Instruments TMS320TCI648x - Manual (Page 192)

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5.61 Local Configuration Space Base Address 1 CSR (LCL_CFG_BAR)
SRIO Registers
The local configuration space base address 1 CSR (LCL_CFG_BAR) is shown in Figure 124 and
described in Table 132 .
Figure 124. Local Configuration Space Base Address 1 CSR (LCL_CFG_BAR) - Address Offset
105Ch
31 0
LCSBA
R-00000000h
LEGEND: R = Read only; -n = Value after reset
Table 132. Local Configuration Space Base Address 1 CSR (LCL_CFG_BAR) Field Descriptions
Bit Field Value Description
31–0 LCSBA 00000000h Bit 31 is reserved for 34-bit addresses, bit 35 of a 50-bit address, and bit 35 of a
to 66-bit address.
FFFFFFFFh Bits 30 to 0 are bits 34 to 3 of a 34-bit address, bits 35 to 3 of a 50-bit address, and
bits 35 to 3 of a 66-bit address.
Serial RapidIO (SRIO) 192 SPRUE13A – September 2006
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