Texas Instruments TMS320TCI648x - Manual (Page 242)

SRIO Registers
BYTE_COUNT field of LSUn_REG3 158 B
bad CRC in control symbol at port n
C
rate counting enable field 221
CAPTURE0 field of SPn_ERR_CAPT_DBG1 224
status field 219
CAPTURE1 field of SPn_ERR_CAPT_DBG2 225
bad CRC in packet at port n
CAPTURE2 field of SPn_ERR_CAPT_DBG3 226
rate counting enable field 222
CAPTURE3 field of SPn_ERR_CAPT_DBG4 227
status field 220
CAPTURE_VALID_INFO field of
bandwidth per differential pair based on 1x/4x LP-Serial
SPn_ERR_ATTR_CAPT_DBG0 223
specification 18
CBA_TRANS_PRI field of PER_SET_CNTL 113
BASE_DEVICEID field of BASE_ID 193
cc field of RX buffer descriptor 47
BASE_ID 193
cc field of TX buffer descriptor 52
base address registers for local configuration space
CDR field of SERDES_CFGRXn_CNTL 125
191, 192
CLASS field of PID 111 base device ID CSR 193
clearing interrupt conditions 86
base device ID for host PE 194
clear registers
Big Endian versus Little Endian 68
for CPPI interrupt conditions 135, 137 binary notational convention 14
for doorbell interrupt conditions 133 BLK0_EN_STAT field of GBL_EN_STAT 117
for error, reset, and special event (port) interrupt BLK1_EN_STAT field of GBL_EN_STAT 117
conditions 143
BLK2_EN_STAT field of GBL_EN_STAT 117
for LSU interrupt conditions 141
BLK3_EN_STAT field of GBL_EN_STAT 117
clock/data recovery field 125
BLK4_EN_STAT field of GBL_EN_STAT 117
clock domains 21
BLK5_EN_STAT field of GBL_EN_STAT 117
clock prescaler field 233
BLK6_EN_STAT field of GBL_EN_STAT 117
clock recovery 21
BLK7_EN_STAT field of GBL_EN_STAT 117
CMD field of SPn_CS_TX 240
BLK8_EN_STAT field of GBL_EN_STAT 117
CM field of SERDES_CFGTXn_CNTL 128
BLKn_EN 119
CNTL_SYM_UNEXPECTED_ACKID_EN field of
BLKn_EN_STAT 120
SPn_RATE_EN 221
block 0 enable status bit 118
CNTL_SYM_UNEXPECTED_ACKID field of
block 1 enable status bit 117
SPn_ERR_DET 219
block 2 enable status bit 117
command control symbol field for port n 240
block 3 enable status bit 117
COMMAND field of SPn_LM_REQ 200
block 4 enable status bit 117
command status (completion code) field for LSUn 161
block 5 enable status bit 117
common mode field 128
block 6 enable status bit 117
common transport large system support field 186
block 7 enable status bit 117
Communications Port Programming Interface. See CPPI
block 8 enable status bit 117
43
block diagram of SRIO components 26
COMP_TAG 195
block diagram of SRIO peripheral 21
COMPLETION_CODE field of LSUn_REG6 161
block enable registers 119
completion pointer for RX queue n 167
block enable status registers 120
completion pointer for TX queue n 165
BOOT_COMPLETE field of PER_SET_CNTL 113
COMPONENT_TAG field of COMP_TAG 195
bootloading
configuration offset field for LSUn 156
access to read-only registers 113 configuring SERDES macros 28
configuration and operation 79 congestion control 65
data movement 80 basic scheme 66
device wakeup afterwards 80
congestion control packet (CCP) Ftype and Ttype 25
BRIDGE field of PE_FEAT 186
congestion control packet (CCP) purpose 65
bridge present field 186
count of Xoff congestion control packets 66
BSY field of LSUn_REG6 161
flow control destination IDs 66
buffer_pointer field of RX buffer descriptor 47
flow masks 67
buffer_pointer field of TX buffer descriptor 52
time-out timer 66
BUSWIDTH field of SERDES_CFGRXn_CNTL 125
control capture CSR for logical/transport errors 217
BUSWIDTH field of SERDES_CFGTXn_CNTL 128
control information field for port n error capture 224
busy (BSY) signal of an LSU 39
control symbols
busy status field for LSUn 161
acknowledge or link-response control symbol overdue
242 Index SPRUE13A – September 2006
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