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0270h, Section 5.24, Err_rst_evnt_icsr) – Texas Instruments TMS320TCI648x User Manual

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5.24 Error, Reset, and Special Event Interrupt Condition Status Register

SRIO Registers

(ERR_RST_EVNT_ICSR)

Each of the nonreserved bits in this register indicate the status of a particular interrupt condition in one or
more of the SRIO ports. ERR_RST_EVNT_ICSR is shown in

Figure 85

and described in

Table 75

. For

additional programming information, see

Section 4.3.4

.

Figure 85. Error, Reset, and Special Event Interrupt Condition Status Register

(ERR_RST_EVNT_ICSR) - Address Offset 0270h

31

17

16

Reserved

ICS16

R-0

R-0

15

12

11

10

9

8

7

3

2

1

0

Reserved

ICS11

ICS10

ICS9

ICS8

Reserved

ICS2

ICS1

ICS0

R-0

R-0

R-0

R-0

R-0

R-0

R-0

R-0

R-0

LEGEND: R = Read only; W = Write only; -n = Value after reset

Table 75. Error, Reset, and Special Event Interrupt Condition Status Register

(ERR_RST_EVNT_ICSR) Field Descriptions

Bit

Field

Value

Description

31–17

Reserved

0

These reserved bits return 0s when read.

16

ICS16

0

Device reset interrupt not received from any port

1

Device reset interrupt received from any port

15–12

Reserved

0

These reserved bits return 0s when read.

11

ICS11

0

Error not detected on port 3

1

Error detected on port 3

10

ICS10

0

Error not detected on port 2

1

Error detected on port 2

9

ICS9

0

Error not detected on port 1

1

Error detected on port 1

8

ICS8

0

Error not detected on port 0

1

Error detected on port 0

7–3

Reserved

0

These reserved bits return 0s when read.

2

ICS2

0

Logical layer error management event capture not detected

1

Logical layer error management event capture detected

1

ICS1

0

Port-write-in request not received on any port

1

Port-write-in request received on any port

0

ICS0

0

Multi-cast event control symbol interrupt not received on any port

1

Multi-cast event control symbol interrupt received on any port

Serial RapidIO (SRIO)

142

SPRUE13A – September 2006

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