Panasonic MN103001G/F01K - Manual (Page 268)

16-bit Timers
11-14
Timer 10 compare/capture B mode register
Register symbol: TM10MDB
Address: x'340010B1
Purpose: This register controls the operation of the timer 10 compare/capture B register.
This register also sets the waveform that is output to TM10IOB pin.
Bit No. 7 6 5 4 3 2 1 0
Bit TM10 TM10 TM10 TM10
–
TM10 TM10 TM10
name BM1 BM0 BEG BCE BO2 BO1 BO0
Reset 0 0 0 0 0 0 0 0
Access R/W R/W R/W R/W R R/W R/W R/W
Bit No. Bit name Description
0 TM10BO0 Timer 10B output waveform selection flag (LSB)
1 TM10BO1 Timer 10B output waveform selection flag
2 TM10BO2 Timer 10B output waveform selection flag (MSB)
These bits select the waveform that is output to the TM10IOB pin.
000: Set when TMnBC matches TMnCB, reset when TMnBC matches TMnCA.
001: Set when TMnBC matches TMnCB, reset when TMnBC overflows.
010: Set when TMnBC matches TMnCB, reset only when the timer is initialized.
011: Reset when TMnBC matches TMnCB.
100: Toggled output (Output is inverted when TMnBC matches TMnCB.)
101, 110, 111: Setting prohibited.
3 — "0" is returned when this bit is read.
4 TM10BCE Timer 10 capture B operation enable flag
Enables/disables capture operation for TM10CB.
0: Disables capture operation. (Pin input is ignored.)
1: Enables capture operation.
5 TM10BEG Timer 10B pin polarity selection flag
Selects the valid edge for the input on the TM10IOB pin, and the output polarity.
0: Rising edge valid
Positive polarity output (Reset: “L” level; set: “H” level)
1: Falling edge valid
Negative polarity output (Reset: “H” level; set: “L” level)
6 TM10BM0 Timer 10 compare/capture B operating mode setting flag (LSB)
7 TM10BM1 Timer 10 compare/capture B operating mode setting flag (MSB)
These bits set the TM10CB operating mode.
00: Compare register (single-buffer)
01: Compare register (double-buffer)
10: Capture register (single-edge operation)
11: Capture register (dual-edge operation)
When dual-edge capture is set, the setting of TM10BEG is ignored.