Panasonic MN103001G/F01K - Manual (Page 199)

Interrupt Controller
9-11
Group 3 interrupt control register
Register symbol: G3ICR
Address: x'3400010C
Purpose: This register is used to enable group 3 interrupts, and to confirm interrupt requests and detection.
Bit No. 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Bit - G3 G3 G3 TM7 TM6 TM5 TM4 TM7 TM6 TM5 TM4 TM7 TM6 TM5 TM4
name LV2 LV1 LV0 IE IE IE IE IR IR IR IR ID ID ID ID
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Access R R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Bit No. Bit name Description
0 TM4ID Timer 4 underflow interrupt detection flag
0: No interrupt detected 1: Interrupt detected
1 TM5ID Timer 5 underflow interrupt detection flag
0: No interrupt detected 1: Interrupt detected
2 TM6ID Timer 6 underflow interrupt detection flag
0: No interrupt detected 1: Interrupt detected
3 TM7ID Timer 7 underflow interrupt detection flag
0: No interrupt detected 1: Interrupt detected
4 TM4IR Timer 4 underflow interrupt request flag
0: No interrupt request 1: Interrupt request
5 TM5IR Timer 5 underflow interrupt request flag
0: No interrupt request 1: Interrupt request
6 TM6IR Timer 6 underflow interrupt request flag
0: No interrupt request 1: Interrupt request
7 TM7IR Timer 7 underflow interrupt request flag
0: No interrupt request 1: Interrupt request
8 TM4IE Timer 4 underflow interrupt enable flag
0: Disabled 1: Enabled
9 TM5IE Timer 5 underflow interrupt enable flag
0: Disabled 1: Enabled
10 TM6IE Timer 6 underflow interrupt enable flag
0: Disabled 1: Enabled
11 TM7IE Timer 7 underflow interrupt enable flag
0: Disabled 1: Enabled
12 G3LV0 Group 3 interrupt priority level register (LSB)
13 G3LV1 Group 3 interrupt priority level register
14 G3LV2 Group 3 interrupt priority level register (MSB)
Set a level from 6 to 0.
15 — "0" is returned when this bit is read.