Panasonic MN103001G/F01K - Manual (Page 146)

Bus Controller (BC)
8-32
8.13 External Memory Space Access (Non-DRAM Spaces)
During an access to external memory, the BC controls the interface for the read/write request from the CPU. Table
8-13-1 lists the transactions that are supported for the external bus.
Table 8-13-1 External Bus Transaction
Address
Bus width
Mode
/data Synchronization Asynchronization
Separation
8 Fixed wait Handshaking Fixed wait
16 Fixed wait Handshaking Fixed wait
Multiplex
8 Fixed wait Handshaking Fixed wait
16 Fixed wait Handshaking Fixed wait