Test and debugging, Etm9 embedded trace macrocell, Trace modes – Siemens ERTEC200 User Manual
Page 94: Features of the etm9 module, Etm9 registers, Table 34: detailed description of memory segments, 11 test and debugging
11 Test and Debugging
11.1 ETM9 Embedded Trace Macrocell
An ETM9 module is integrated in the ARM946E-S of the ERTEC 200 to enable the instruction code and data to be
traced. The ARM946E-S supplies the ETM module with the signals needed to carry out the trace functions. The ETM9
module is operated by means of the Trace interface or JTAG interface. The trace information is stored in an internal
FIFO and forwarded to the debugger via the interface. The ETM interface is available as an alternative function on the
LBU port. It is selected via the configuration pins CONGIG[6, 5, 2] = 101 b.
11.1.1 Trace
Modes
•
Normal mode with 4- or 8-bit data width
• Transmission
mode
o
Fullrate mode at 50 or 100 MHz (data are accepted via debugger on rising trace clock edge)
o
Halfrate mode at 150 MHz (data are accepted via debugger on both trace clock edges)
11.1.2 Features of the ETM9 Module
In the ERTEC 200, the ETM9 module is medium type.
It has the following features:
•
4 address comparators
•
2 data comparators with filter function
•
1 trigger input (available externally via GPIO)
•
1 trigger output (available externally via GPIO)
•
8 memory map decoders for decoding the physical address area of the ERTEC 200
(*1)
• 1
sequencer
• 2
counters
*1 Supplemental to the ETM0 specification, the 8 MMD regions have been decoded via the hardware:
•
SEG0: 0k – 4k
: Instruction and data access to I-cache
•
SEG0: full
: Instruction and data access to BOOT ROM / SDRAM / CS0
•
SEG1: 0M – 1M
: Data access to IRT register
•
SEG1: 1M – 2M
: Instruction and data access to IRT KRAM
•
SEG2: 0M – 256M
: Instruction and data access to external SDRAM
•
SEG3: 0k – 16k
: Instruction and data access to external CS0 (normally Flash)
•
SEG3: 16k – 32k
: Instruction and data access to external CS1 (normally SRAM)
•
SEG4,5,7,8: full
: Data access to internal registers (APB, ICU, EMIF, DMA)
For more information on the ETM, refer to Section 9 of /1/.
11.1.3 ETM9
Registers
The ETM registers are not described in this document because they are handled differently according the ETM version
being used.
For a detailed description, refer to /7/.
Copyright © Siemens AG 2007. All rights reserved.
94
ERTEC 200 Manual
Technical data subject to change Version 1.1.0