Measurement Computing ADAC-LVi - Manual (Page 155)

Chapter 2 Digital I/O Library
ADAC LabVIEW VI 149
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Pattern Mask The PatternPolarity, PatternTransition and PatternMask
define the match condition for the Port Mode Specification AND / OR
modes.
For example one can define a match condition as bit 1, bit 2 and bit 3
all set = "1" as a valid match (AND mode) by setting the following.
Port Mode Specification = AND
PatternPolarity = (b) 1110
PatternTransition = (b) 0
PatternMask = (b) 1110
Alternately, one can define a match condition as any one or more of bit
1, bit 2 and bit 3 having set = "1" by changing the Port Mode
Specification to OR mode.
PM(n) PT(n) PP(n) Pattern Match Bit Definitions
0 0 0 or 1 Bit Masked Off
0 1 0 or 1 Any Transition
1 0 0 ZERO
1 0 1 ONE
1 1 0 ONE to ZERO Transiton
1 1 1 ZERO to ONE Transition
For detailed definitions see the 5600 manuals ADVANCED
PROGRAMMING TECHNIQUES. When the PortResolution=16,
PatternPolarity, PatternTransition and PatternMask are set in WORDs
b(1111111111111111).
Ignore IP Error The Ignore IP Error setting controls the ADAC-LVi
driver pattern match error condition. A setting of TRUE stops the
generation of an error condition when a match condition occurs while
another match is being serviced, indicating match conditions are
occurring faster than they can be serviced.