Zilog Z86193 - Manual (Page 92)

Z8
®
CPU
User Manual
UM001604-0108 Counters and Timers
85
82). When the Prescaler Counter reaches its end-of-count, the initial value is reloaded and
counting continues. The prescaler never actually reaches 0. For example, if the prescaler is
set to divide-by-three, the count sequence is:
3–2–1–3–2–1–3–2–1–3...
Each time the prescaler reaches its end of count a carry is generated, that allows the
Counter/Timer to decrement by one on the next timer clock input. When the Counter/
Timer and the prescaler both reach the end-of-count, an interrupt request is generated
(IRQ4 for T0, IRQ5 for T1). Depending on the counting mode selected, the Counter/Timer
either comes to rest with its value at
00h
(SINGLE-PASS Mode) or the initial value is
automatically reloaded and counting continues (Continuous Mode). The counting modes
are controlled by bit 0 of PRE0 and bit 0 of PRE1 (see
Figure 75 on page 84). A 0, written
to this bit configures the counter for Single-pass counting mode, while a 1 written to this
bit configures the counter for Continuous mode.
The Counter/Timer can be stopped at any time by setting the Enable Count bit to 0, and
restarted by setting it back to 1. The Counter/Timer continues its count value at the time it
was stopped. The current value in the Counter/Timer can be read at any time without
affecting the counting operation.
The prescaler registers are write-only and cannot be read.
New initial values can be written to the prescaler or the Counter/Timer registers at any
time. These values are transferred to their respective down counters on the next load oper-
ation. If the Counter/Timer mode is continuous, the next load occurs on the timer clock
following an end-of-count. New initial values should be written before the load operation,
because the prescalers always effectively operate in Continuous count mode.
The time interval (i) until end-of-count, is given by the equation:
i = t x p x v
in which t = four times the internal clock period.
The internal clock frequency defaults to the external clock source (XTAL, ceramic resona-
tor, and others) divided by 2. Some Z8 microcontrollers allow this divisor to be changed
via the Stop Mode Recovery register. See the product data sheet for available clock divisor
options.
t is equal to eight divided-by-XTAL frequency of the external clock source for T1 (exter-
nal clock mode only).
p = the prescaler value (1–63) for T
0
and T
1
.
The minimum prescaler count of 1 is achieved by loading
000001xx
. The maximum pres-
caler count of 63 is achieved by loading
111111xx
.
v = the Counter/Timer value (1–256)
Note: