Zilog Z86193 - Manual (Page 27)

Z8
®
CPU
User Manual
UM001604-0108 Address Space
20
Z8
®
External Memory
Z8 CPU, in some cases, has the capability to access external Program Memory with the
16-bit Program Counter. To access external Program Memory the Z8 CPU offers multi-
plexed address/data lines (AD7–AD0) on Port 1 and address lines (A15–A8) on Port 0.
This feature only applies to devices that offer Port 0 and Port 1. The maximum external
address is
FFFF . This memory interface is supported by the control lines AS (Address
Strobe), DS (Data Strobe), and R/W (Read/Write). The origin of the external Program
Memory starts after the last address of the internal ROM.
Figure 9 on page 21 displays an
example of external Program Memory for the Z8 CPU.
Figure 8. Z8
®
Program Memory Map
Interrupt
External
On–Chip
65535
ROM and RAM
ROM
IRQ
5
4096
Interrupt
Location of
IRQ
0
IRQ
0
IRQ
1
IRQ
1
IRQ
2
IRQ
2
IRQ
3
IRQ
3
IRQ
4
IRQ
4
IRQ
5
4095
12
1
2
3
4
5
6
7
8
9
10
11
0
First Byte of
Instruction
Executed
After RESET
Vector
(Lower Byte)
Vector
(Upper Byte)