Zilog Z86193 - Manual (Page 23)

Z8
®
CPU
User Manual
UM001604-0108 Address Space
16
•
Program Control Flags (FLAGS)
•
Register Pointer (RP)
•
Stack Pointer High-Byte (SPH)
•
Stack Pointer Low-Byte (SPL)
The Z8
®
CPU uses a 16-bit Program Counter (PC) to determine the sequence of current
program instructions. The PC is not an addressable register.
Peripheral registers are used to transfer data, configure the operating mode, and control the
operation of the on-chip peripherals. Any instruction that references the register file can
access the peripheral registers. The peripheral registers are:
•
Serial I/O (SIO)
•
Timer Mode (TMR)
•
Timer/Counter 0 (T0)
•
T0 Prescaler (PRE0)
•
Timer/Counter 1 (T1)
•
T1 Prescaler (PRE1)
•
Port 0–1 Mode (P01M)
•
Port 2 Mode (P2M)
•
Port 3 Mode (P3M)
In addition, the four port registers (P0–P3) are considered to be peripheral registers.
Expanded Z8 Registers
The expanded Z8 control registers govern the operation of additional features or peripher-
als. Any instruction which references the register file can access these registers.
The ERF contains the control registers for WDT, Port Control, Serial Peripheral Interface
(SPI), and the SMR functions.
Figure 6 on page 11 displays the layout of the Register
Banks in the ERF. Register Bank C in the ERF consists of the registers for the SPI. Table 8
lists the registers within ERF Bank C, Working Register Group 0.
Table 8. ERF Bank C WR Group 0
Register Function Working Register
F Reserved R15
E Reserved R14
D Reserved R13