Altera Stratix IV GX FPGA Development Board - Manual (Page 5)

August 2012 Altera Corporation Stratix IV GX FPGA Development Board
Reference Manual
1. Overview
This document describes the hardware features of the Stratix ® IV GX FPGA
development board, including the detailed pin-out and component reference
information required to create custom FPGA designs that interface with all
components of the board.
General Description
The Stratix IV GX FPGA development board provides a hardware platform for
developing and prototyping low-power, high-performance, and logic-intensive
designs. The board provides a wide range of peripherals and memory interfaces to
facilitate the development of the Stratix IV GX FPGA designs.
Two High-Speed Mezzanine Card (HSMC) connectors are available to add additional
functionality via a variety of HSMC cards available from both Altera and various
partners.
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To see a list of the latest HSMC cards available or to download a copy of the HSMC
specification, refer to the
Development Board Daughtercards page of the Altera
website.
Design advancements and innovations, such as the 8.5 Gbps transceiver modules, the
PCI Express hard IP implementation, and programmable power technology ensure
that designs implemented in the Stratix IV GX FPGAs operate faster, with lower
power than in previous FPGA families.
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For more information on the following topics, refer to the respective documents:
■ Stratix IV device family, refer to the Stratix IV Device Handbook .
■ PCI Express MegaCore function, refer to the PCI Express Compiler User Guide .
■ Altera Video and Image Processing Suite MegaCore functions, refer to the Video
and Image Processing Suite User Guide .
■ HSMC Specification, refer to the High Speed Mezzanine Card (HSMC) Specification .