Altera Stratix IV GX FPGA Development Board - Manual (Page 47)

Chapter 2: Board Components 2–39
Components and Interfaces
August 2012 Altera Corporation Stratix IV GX FPGA Development Board
Reference Manual
Table 2–38 lists the HSMC port B interface pin assignments, signal names, and
functions.
Table 2–38. HSMC Port B Pin Assignments, Schematic Signal Names, and Functions (Part 1 of 4)
Board
Reference
Description Schematic Signal
Name
I/O Standard
Stratix IV GX
Device
Pin Number
J2.1 Transceiver TX bit 7 HSMB_TX_P7 1.4-V PCML —
J2.2 Transceiver RX bit 7 HSMB_RX_P7 1.4-V PCML —
J2.3 Transceiver TX bit 7n HSMB_TX_N7 1.4-V PCML —
J2.4 Transceiver RX bit 7n HSMB_RX_N7 1.4-V PCML —
J2.5 Transceiver TX bit 6 HSMB_TX_P6 1.4-V PCML —
J2.6 Transceiver RX bit 6 HSMB_RX_P6 1.4-V PCML —
J2.7 Transceiver TX bit 6n HSMB_TX_N6 1.4-V PCML —
J2.8 Transceiver RX bit 6n HSMB_RX_N6 1.4-V PCML —
J2.9 Transceiver TX bit 5 HSMB_TX_P5 1.4-V PCML D4
J2.10 Transceiver RX bit 5 HSMB_RX_P5 1.4-V PCML E2
J2.11 Transceiver TX bit 5n HSMB_TX_N5 1.4-V PCML D3
J2.12 Transceiver RX bit 5n HSMB_RX_N5 1.4-V PCML E1
J2.13 Transceiver TX bit 4 HSMB_TX_P4 1.4-V PCML B4
J2.14 Transceiver RX bit 4 HSMB_RX_P4 1.4-V PCML C2
J2.15 Transceiver TX bit 4n HSMB_TX_N4 1.4-V PCML B3
J2.16 Transceiver RX bit 4n HSMB_RX_N4 1.4-V PCML C1
J2.17 Transceiver TX bit 3 HSMB_TX_P3 1.4-V PCML B36
J2.18 Transceiver RX bit 3 HSMB_RX_P3 1.4-V PCML C38
J2.19 Transceiver TX bit 3n HSMB_TX_N3 1.4-V PCML B37
J2.20 Transceiver RX bit 3n HSMB_RX_N3 1.4-V PCML C39
J2.21 Transceiver TX bit 2 HSMB_TX_P2 1.4-V PCML D36
J2.22 Transceiver RX bit 2 HSMB_RX_P2 1.4-V PCML E38
J2.23 Transceiver TX bit 2n HSMB_TX_N2 1.4-V PCML D37
J2.24 Transceiver RX bit 2n HSMB_RX_N2 1.4-V PCML E39
J2.25 Transceiver TX bit 1 HSMB_TX_P1 1.4-V PCML K36
J2.26 Transceiver RX bit 1 HSMB_RX_P1 1.4-V PCML L38
J2.27 Transceiver TX bit 1n HSMB_TX_N1 1.4-V PCML K37
J2.28 Transceiver RX bit 1n HSMB_RX_N1 1.4-V PCML L39
J2.29 Transceiver TX bit 0 HSMB_TX_P0 1.4-V PCML M36
J2.30 Transceiver RX bit 0 HSMB_RX_P0 1.4-V PCML N38
J2.31 Transceiver TX bit 0n HSMB_TX_N0 1.4-V PCML M37
J2.32 Transceiver RX bit 0n HSMB_RX_N0 1.4-V PCML N39
J2.33 Management serial data HSMB_SDA 2.5-V AF29
J2.34 Management serial clock HSMB_SCL 2.5-V AB27
J2.35 JTAG clock signal FPGA_JTAG_TCK 2.5-V —
J2.36 JTAG mode select signal FPGA_JTAG_TMS 2.5-V —