Altera Stratix IV GX FPGA Development Board - Manual (Page 45)

Chapter 2: Board Components 2–37
Components and Interfaces
August 2012 Altera Corporation Stratix IV GX FPGA Development Board
Reference Manual
J1.55 LVDS TX bit 1n or CMOS bit 10 HSMA_TX_D_N1 LVDS or 2.5-V AP7
J1.56 LVDS RX bit 1n or CMOS bit 11 HSMA_RX_D_N1 LVDS or 2.5-V AU8
J1.59 LVDS TX bit 2 or CMOS bit 12 HSMA_TX_D_P2 LVDS or 2.5-V AE13
J1.60 LVDS RX bit 2 or CMOS bit 13 HSMA_RX_D_P2 LVDS or 2.5-V AP8
J1.61 LVDS TX bit 2n or CMOS bit 14 HSMA_TX_D_N2 LVDS or 2.5-V AE12
J1.62 LVDS RX bit 2n or CMOS bit 15 HSMA_RX_D_N2 LVDS or 2.5-V AR8
J1.65 LVDS TX bit 3 or CMOS bit 16 HSMA_TX_D_P3 LVDS or 2.5-V AL8
J1.66 LVDS RX bit 3 or CMOS bit 17 HSMA_RX_D_P3 LVDS or 2.5-V AW6
J1.67 LVDS TX bit 3n or CMOS bit 18 HSMA_TX_D_N3 LVDS or 2.5-V AM8
J1.68 LVDS RX bit 3n or CMOS bit 19 HSMA_RX_D_N3 LVDS or 2.5-V AW5
J1.71 LVDS TX bit 4 or CMOS bit 20 HSMA_TX_D_P4 LVDS or 2.5-V AK9
J1.72 LVDS RX bit 4 or CMOS bit 21 HSMA_RX_D_P4 LVDS or 2.5-V AV5
J1.73 LVDS TX bit 4n or CMOS bit 22 HSMA_TX_D_N4 LVDS or 2.5-V AL9
J1.74 LVDS RX bit 4n or CMOS bit 23 HSMA_RX_D_N4 LVDS or 2.5-V AW4
J1.77 LVDS TX bit 5 or CMOS bit 24 HSMA_TX_D_P5 LVDS or 2.5-V AK8
J1.78 LVDS RX bit 5 or CMOS bit 25 HSMA_RX_D_P5 LVDS or 2.5-V AT7
J1.79 LVDS TX bit 5n or CMOS bit 26 HSMA_TX_D_N5 LVDS or 2.5-V AK7
J1.80 LVDS RX bit 5n or CMOS bit 27 HSMA_RX_D_N5 LVDS or 2.5-V AU7
J1.83 LVDS TX bit 6 or CMOS bit 28 HSMA_TX_D_P6 LVDS or 2.5-V AH10
J1.84 LVDS RX bit 6 or CMOS bit 29 HSMA_RX_D_P6 LVDS or 2.5-V AT6
J1.85 LVDS TX bit 6n or CMOS bit 30 HSMA_TX_D_N6 LVDS or 2.5-V AJ10
J1.86 LVDS RX bit 6n or CMOS bit 31 HSMA_RX_D_N6 LVDS or 2.5-V AU6
J1.89 LVDS TX bit 7 or CMOS bit 32 HSMA_TX_D_P7 LVDS or 2.5-V AH9
J1.90 LVDS RX bit 7 or CMOS bit 33 HSMA_RX_D_P7 LVDS or 2.5-V AR5
J1.91 LVDS TX bit 7n or CMOS bit 34 HSMA_TX_D_N7 LVDS or 2.5-V AH8
J1.92 LVDS RX bit 7n or CMOS bit 35 HSMA_RX_D_N7 LVDS or 2.5-V AT5
J1.95 LVDS or CMOS clock out 1 or CMOS bit 36 HSMA_CLK_OUT_P1 LVDS or 2.5-V AL10
J1.96 LVDS or CMOS clock in 1 or CMOS bit 37 HSMA_CLK_IN_P1 LVDS or 2.5-V AC6
J1.97 LVDS or CMOS clock out 1 or CMOS bit 38 HSMA_CLK_OUT_N1 LVDS or 2.5-V AM10
J1.98 LVDS or CMOS clock in 1 or CMOS bit 39 HSMA_CLK_IN_N1 LVDS or 2.5-V AC5
J1.101 LVDS TX bit 8 or CMOS bit 40 HSMA_TX_D_P8 LVDS or 2.5-V AG8
J1.102 LVDS RX bit 8 or CMOS bit 41 HSMA_RX_D_P8 LVDS or 2.5-V AP6
J1.103 LVDS TX bit 8n or CMOS bit 42 HSMA_TX_D_N8 LVDS or 2.5-V AG7
J1.104 LVDS RX bit 8n or CMOS bit 43 HSMA_RX_D_N8 LVDS or 2.5-V AP5
J1.107 LVDS TX bit 9 or CMOS bit 44 HSMA_TX_D_P9 LVDS or 2.5-V AG10
J1.108 LVDS RX bit 9 or CMOS bit 45 HSMA_RX_D_P9 LVDS or 2.5-V AN6
J1.109 LVDS TX bit 9n or CMOS bit 46 HSMA_TX_D_N9 LVDS or 2.5-V AG9
J1.110 LVDS RX bit 9n or CMOS bit 47 HSMA_RX_D_N9 LVDS or 2.5-V AN5
Table 2–37. HSMC Port A Pin Assignments, Schematic Signal Names, and Functions (Part 3 of 4)
Board
Reference
Description
Schematic Signal
Name
I/O Standard
Stratix IV GX
Device
Pin Number