Dual fpga, Fpga 1, Dual fpga –3 – Altera Arria V GT FPGA Development Board User Manual

Page 7: Fpga 1 –3

Chapter 1: Overview

1–3

Board Component Blocks

December 2014

Altera Corporation

Arria V GT FPGA Development Board

Reference Manual

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Mechanical

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PCI Express long form factor (4.376” x 10.45”)

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PCI Express chassis or bench-top operation

Dual FPGA

The development board includes two Arria V GT FPGAs that connect to other
components on the board to provide a better transceiver and bandwidth design
solution.

FPGA 1

The first FPGA device (FPGA 1) connects to the following components:

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Communication ports

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One PCI Express x8 edge connector

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One universal HSMC expansion port (port A)

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One USB 2.0 connector

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One gigabit Ethernet port

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Chip-to-Chip (C2C) bridge with 29 LVDS inputs and 29 LVDS outputs, and x8
transceivers

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Two small form factor pluggable plus (SFP+) channels

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One SMA 10 Gbps transceiver channel

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Three Bull’s Eye 10 Gbps transceiver channels

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Memory

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1152-Mbyte (MB) DDR3 SDRAM with a 72-bit data bus

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72-Mbit (Mb) QDRII+ SRAM

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1-Gbit (Gb) synchronous flash with a 16-bit data bus