Altera Arria V GT FPGA Development Board - Manual (Page 54)

2–44 Chapter 2: Board Components
Components and Interfaces
Arria V GT FPGA Development Board December 2014 Altera Corporation
Reference Manual
103 HSMB_TX_D_N8 AM27 LVDS or 2.5-V LVDS TX bit 8n or CMOS bit 42
104 HSMB_RX_D_N8 AT29 LVDS or 2.5-V LVDS RX bit 8n or CMOS bit 43
107 HSMB_TX_D_P9 AP30 LVDS or 2.5-V LVDS TX bit 9 or CMOS bit 44
108 HSMB_RX_D_P9 AW31 LVDS or 2.5-V LVDS RX bit 9 or CMOS bit 45
109 HSMB_TX_D_N9 AN30 LVDS or 2.5-V LVDS TX bit 9n or CMOS bit 46
110 HSMB_RX_D_N9 AW30 LVDS or 2.5-V LVDS RX bit 9n or CMOS bit 47
113 HSMB_TX_D_P10 AR28 LVDS or 2.5-V LVDS TX bit 10 or CMOS bit 48
114 HSMB_RX_D_P10 AW28 LVDS or 2.5-V LVDS RX bit 10 or CMOS bit 49
115 HSMB_TX_D_N10 AP28 LVDS or 2.5-V LVDS TX bit 10n or CMOS bit 50
116 HSMB_RX_D_N10 AW29 LVDS or 2.5-V LVDS RX bit 10n or CMOS bit 51
119 HSMB_TX_D_P11 AV30 LVDS or 2.5-V LVDS TX bit 11 or CMOS bit 52
120 HSMB_RX_D_P11 AU27 LVDS or 2.5-V LVDS RX bit 11 or CMOS bit 53
121 HSMB_TX_D_N11 AU30 LVDS or 2.5-V LVDS TX bit 11n or CMOS bit 54
122 HSMB_RX_D_N11 AT27 LVDS or 2.5-V LVDS RX bit 11n or CMOS bit 55
125 HSMB_TX_D_P12 AV31 LVDS or 2.5-V LVDS TX bit 12 or CMOS bit 56
126 HSMB_RX_D_P12 AW27 LVDS or 2.5-V LVDS RX bit 12 or CMOS bit 57
127 HSMB_TX_D_N12 AU31 LVDS or 2.5-V LVDS TX bit 12n or CMOS bit 58
128 HSMB_RX_D_N12 AV27 LVDS or 2.5-V LVDS RX bit 12n or CMOS bit 59
131 HSMB_TX_D_P13 AR27 LVDS or 2.5-V LVDS TX bit 13 or CMOS bit 60
132 HSMB_RX_D_P13 AW32 LVDS or 2.5-V LVDS RX bit 13 or CMOS bit 61
133 HSMB_TX_D_N13 AP27 LVDS or 2.5-V LVDS TX bit 13n or CMOS bit 62
134 HSMB_RX_D_N13 AW33 LVDS or 2.5-V LVDS RX bit 13n or CMOS bit 63
137 HSMB_TX_D_P14 AP31 LVDS or 2.5-V LVDS TX bit 14 or CMOS bit 64
138 HSMB_RX_D_P14 AT31 LVDS or 2.5-V LVDS RX bit 14 or CMOS bit 65
139 HSMB_TX_D_N14 AN31 LVDS or 2.5-V LVDS TX bit 14n or CMOS bit 66
140 HSMB_RX_D_N14 AR31 LVDS or 2.5-V LVDS RX bit 14n or CMOS bit 67
143 HSMB_TX_D_P15 AP32 LVDS or 2.5-V LVDS TX bit 15 or CMOS bit 68
144 HSMB_RX_D_P15 AV28 LVDS or 2.5-V LVDS RX bit 15 or CMOS bit 69
145 HSMB_TX_D_N15 AN32 LVDS or 2.5-V LVDS TX bit 15n or CMOS bit 70
146 HSMB_RX_D_N15 AU28 LVDS or 2.5-V LVDS RX bit 15n or CMOS bit 71
149 HSMB_TX_D_P16 AP33 LVDS or 2.5-V LVDS TX bit 16 or CMOS bit 72
150 HSMB_RX_D_P16 AT30 LVDS or 2.5-V LVDS RX bit 16 or CMOS bit 73
151 HSMB_TX_D_N16 AN33 LVDS or 2.5-V LVDS TX bit 16n or CMOS bit 74
152 HSMB_RX_D_N16 AR30 LVDS or 2.5-V LVDS RX bit 16n or CMOS bit 75
155 HSMB_CLK_OUT_P2 AE26 LVDS or 2.5-V LVDS or CMOS clock out 2 or CMOS bit 76
156 HSMB_CLK_IN_P2 AU32 LVDS or 2.5-V LVDS or CMOS clock in 2 or CMOS bit 77
157 HSMB_CLK_OUT_N2 AD26 LVDS or 2.5-V LVDS or CMOS clock out 2 or CMOS bit 78
Table 2–27. HSMC Port B Pin Assignments, Schematic Signal Names, and Functions (Part 3 of 4)
Board
Reference (J2) Schematic Signal Name
Arria V GT
FPGA
Pin Number
I/O Standard Description