Configuration, status, and setup elements, Configuration, Fpga programming over on-board usb-blaster ii – Altera Arria V GT FPGA Development Board User Manual
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Chapter 2: Board Components
Configuration, Status, and Setup Elements
Arria V GT FPGA Development Board
December 2014
Altera Corporation
Reference Manual
Configuration, Status, and Setup Elements
This section describes the board's configuration, status, and setup elements.
Configuration
This section describes the FPGA, flash memory, and MAX
II CPLD EPM2210 System
Controller device programming methods supported by the Arria V GT FPGA
development board.
The Arria V GT FPGA development board supports the following three configuration
methods:
■
On-board USB-Blaster II is the default method for configuring the FPGA at any
time using the Quartus II Programmer in JTAG mode with the supplied USB cable.
■
External USB-Blaster for configuring the FPGA using an external USB-Blaster that
connects to the JTAG programming header (J1).
■
Flash memory download for configuring the FPGA using stored images from the
flash memory on either power-up or pressing the program configuration
push button, PGM1_CONFIG (S3).
FPGA Programming over On-Board USB-Blaster II
This configuration method implements a USB Type-AB connector (J7), a FTDI USB 2.0
PHY device (U5), and an Altera MAX II CPLD (U2) to allow the FPGA configuration
using a USB cable that connects directly between the USB port on the board and a USB
port of a PC running the Quartus II software.
The on-board USB-Blaster II in the MAX II CPLD EPM570GM100 normally masters
the JTAG chain. To prevent contention between the JTAG masters, the on-board
USB-Blaster II is automatically disabled when you connect an external USB-Blaster to
the JTAG chain through the JTAG connector.
If the USB-Blaster II is detected but no hardware is found in the chain, try reducing
the clock frequency of the JTAG chain using these commands:
■
To check the current setting: jtagconfig --getparam
■
To set a new setting (example clock frequency = 16 M): jtagconfig --setparam
The USB-Blaster II needs to be 16 M or slower in this case. Only 6 M, 16 M, and 24 M
clock frequency options are available. Insert a value of 1 for the
the only JTAG cable you attach to the board.
1
Installing daughtercards such as HSMC or FMC can affect performance and requires a
lower speed.