Altera Arria V GT FPGA Development Board - Manual (Page 51)

Chapter 2: Board Components 2–41
Components and Interfaces
December 2014 Altera Corporation Arria V GT FPGA Development Board
Reference Manual
98 HSMA_CLK_IN_N1 AV4 LVDS or 2.5-V LVDS or CMOS clock in 1 or CMOS bit 39
101 HSMA_TX_D_P8 AL8 LVDS or 2.5-V LVDS TX bit 8 or CMOS bit 40
102 HSMA_RX_D_P8 AW11 LVDS or 2.5-V LVDS RX bit 8 or CMOS bit 41
103 HSMA_TX_D_N8 AK8 LVDS or 2.5-V LVDS TX bit 8n or CMOS bit 42
104 HSMA_RX_D_N8 AW10 LVDS or 2.5-V LVDS RX bit 8n or CMOS bit 43
107 HSMA_TX_D_P9 AK10 LVDS or 2.5-V LVDS TX bit 9 or CMOS bit 44
108 HSMA_RX_D_P9 AR10 LVDS or 2.5-V LVDS RX bit 9 or CMOS bit 45
109 HSMA_TX_D_N9 AK9 LVDS or 2.5-V LVDS TX bit 9n or CMOS bit 46
110 HSMA_RX_D_N9 AP10 LVDS or 2.5-V LVDS RX bit 9n or CMOS bit 47
113 HSMA_TX_D_P10 AL11 LVDS or 2.5-V LVDS TX bit 10 or CMOS bit 48
114 HSMA_RX_D_P10 AM10 LVDS or 2.5-V LVDS RX bit 10 or CMOS bit 49
115 HSMA_TX_D_N10 AK11 LVDS or 2.5-V LVDS TX bit 10n or CMOS bit 50
116 HSMA_RX_D_N10 AL10 LVDS or 2.5-V LVDS RX bit 10n or CMOS bit 51
119 HSMA_TX_D_P11 AL12 LVDS or 2.5-V LVDS TX bit 11 or CMOS bit 52
120 HSMA_RX_D_P11 AJ13 LVDS or 2.5-V LVDS RX bit 11 or CMOS bit 53
121 HSMA_TX_D_N11 AK12 LVDS or 2.5-V LVDS TX bit 11n or CMOS bit 54
122 HSMA_RX_D_N11 AH13 LVDS or 2.5-V LVDS RX bit 11n or CMOS bit 55
125 HSMA_TX_D_P12 AM13 LVDS or 2.5-V LVDS TX bit 12 or CMOS bit 56
126 HSMA_RX_D_P12 AH11 LVDS or 2.5-V LVDS RX bit 12 or CMOS bit 57
127 HSMA_TX_D_N12 AL13 LVDS or 2.5-V LVDS TX bit 12n or CMOS bit 58
128 HSMA_RX_D_N12 AG11 LVDS or 2.5-V LVDS RX bit 12n or CMOS bit 59
131 HSMA_TX_D_P13 AE12 LVDS or 2.5-V LVDS TX bit 13 or CMOS bit 60
132 HSMA_RX_D_P13 AG12 LVDS or 2.5-V LVDS RX bit 13 or CMOS bit 61
133 HSMA_TX_D_N13 AD12 LVDS or 2.5-V LVDS TX bit 13n or CMOS bit 62
134 HSMA_RX_D_N13 AF12 LVDS or 2.5-V LVDS RX bit 13n or CMOS bit 63
137 HSMA_TX_D_P14 AD11 LVDS or 2.5-V LVDS TX bit 14 or CMOS bit 64
138 HSMA_RX_D_P14 AD13 LVDS or 2.5-V LVDS RX bit 14 or CMOS bit 65
139 HSMA_TX_D_N14 AC12 LVDS or 2.5-V LVDS TX bit 14n or CMOS bit 66
140 HSMA_RX_D_N14 AC13 LVDS or 2.5-V LVDS RX bit 14n or CMOS bit 67
143 HSMA_TX_D_P15 AR13 LVDS or 2.5-V LVDS TX bit 15 or CMOS bit 68
144 HSMA_RX_D_P15 AE13 LVDS or 2.5-V LVDS RX bit 15 or CMOS bit 69
145 HSMA_TX_D_N15 AP13 LVDS or 2.5-V LVDS TX bit 15n or CMOS bit 70
146 HSMA_RX_D_N15 AE14 LVDS or 2.5-V LVDS RX bit 15n or CMOS bit 71
149 HSMA_TX_D_P16 AJ12 LVDS or 2.5-V LVDS TX bit 16 or CMOS bit 72
150 HSMA_RX_D_P16 AG13 LVDS or 2.5-V LVDS RX bit 16 or CMOS bit 73
151 HSMA_TX_D_N16 AH12 LVDS or 2.5-V LVDS TX bit 16n or CMOS bit 74
152 HSMA_RX_D_N16 AF13 LVDS or 2.5-V LVDS RX bit 16n or CMOS bit 75
155 HSMA_CLK_OUT_P2 AM7 LVDS or 2.5-V LVDS or CMOS clock out 2 or CMOS bit 76
Table 2–26. HSMC Port A Pin Assignments, Schematic Signal Names, and Functions (Part 4 of 5)
Board
Reference (J1)
Schematic Signal Name
Arria V GT
FPGA
Pin Number
I/O Standard Description