Altera Arria V GT FPGA Development Board - Manual (Page 57)

Chapter 2: Board Components 2–47
Components and Interfaces
December 2014 Altera Corporation Arria V GT FPGA Development Board
Reference Manual
A39 FMC_DP_C2M_N5 M4 2.5-V CMOS Transmit channel (available in Arria V GT FPGA device)
B37 FMC_DP_C2M_N6 K4 2.5-V CMOS Transmit channel (available in Arria V GT FPGA device)
B33 FMC_DP_C2M_N7 F4 2.5-V CMOS Transmit channel (available in Arria V GT FPGA device)
B29 FMC_DP_C2M_N8 D4 2.5-V CMOS Transmit channel (available in Arria V GT FPGA device)
B25 FMC_DP_C2M_N9 B4 2.5-V CMOS Transmit channel (available in Arria V GT FPGA device)
C2 FMC_DP_C2M_P0 AD3 2.5-V CMOS Transmit channel
A22 FMC_DP_C2M_P1 Y3 2.5-V CMOS Transmit channel
A26 FMC_DP_C2M_P2 T3 2.5-V CMOS Transmit channel
A30 FMC_DP_C2M_P3 P3 2.5-V CMOS Transmit channel
A34 FMC_DP_C2M_P4 H3 2.5-V CMOS Transmit channel
A38 FMC_DP_C2M_P5 M3 2.5-V CMOS Transmit channel (available in Arria V GT FPGA device)
B36 FMC_DP_C2M_P6 K3 2.5-V CMOS Transmit channel (available in Arria V GT FPGA device)
B32 FMC_DP_C2M_P7 F3 2.5-V CMOS Transmit channel (available in Arria V GT FPGA device)
B28 FMC_DP_C2M_P8 D3 2.5-V CMOS Transmit channel (available in Arria V GT FPGA device)
B24 FMC_DP_C2M_P9 B3 2.5-V CMOS Transmit channel (available in Arria V GT FPGA device)
C7 FMC_DP_M2C_N0 AE2 2.5-V CMOS Transmit channel
A3 FMC_DP_M2C_N1 AA2 2.5-V CMOS Transmit channel
A7 FMC_DP_M2C_N2 U2 2.5-V CMOS Transmit channel
A11 FMC_DP_M2C_N3 R2 2.5-V CMOS Transmit channel
A15 FMC_DP_M2C_N4 J2 2.5-V CMOS Transmit channel
A19 FMC_DP_M2C_N5 N2 2.5-V CMOS Transmit channel (available in Arria V GT FPGA device)
B17 FMC_DP_M2C_N6 L2 2.5-V CMOS Transmit channel (available in Arria V GT FPGA device)
B13 FMC_DP_M2C_N7 G2 2.5-V CMOS Transmit channel (available in Arria V GT FPGA device)
B9 FMC_DP_M2C_N8 E2 2.5-V CMOS Transmit channel (available in Arria V GT FPGA device)
B5 FMC_DP_M2C_N9 C2 2.5-V CMOS Transmit channel (available in Arria V GT FPGA device)
C6 FMC_DP_M2C_P0 AE1 2.5-V CMOS Transmit channel
A2 FMC_DP_M2C_P1 AA1 2.5-V CMOS Transmit channel
A6 FMC_DP_M2C_P2 U1 2.5-V CMOS Transmit channel
A10 FMC_DP_M2C_P3 R1 2.5-V CMOS Transmit channel
A14 FMC_DP_M2C_P4 J1 2.5-V CMOS Transmit channel
A18 FMC_DP_M2C_P5 N1 2.5-V CMOS Transmit channel (available in Arria V GT FPGA device)
B16 FMC_DP_M2C_P6 L1 2.5-V CMOS Transmit channel (available in Arria V GT FPGA device)
B12 FMC_DP_M2C_P7 G1 2.5-V CMOS Transmit channel (available in Arria V GT FPGA device)
B8 FMC_DP_M2C_P8 E1 2.5-V CMOS Transmit channel (available in Arria V GT FPGA device)
B4 FMC_DP_M2C_P9 C1 2.5-V CMOS Transmit channel (available in Arria V GT FPGA device)
D4 FMC_GBTCLK_M2C_P0 AB9 2.5-V CMOS Transceiver reference clock 0
D5 FMC_GBTCLK_M2C_N0 AB8 2.5-V CMOS Transceiver reference clock 0
B20 FMC_GBTCLK_M2C_P1 — 2.5-V CMOS Transceiver reference clock 1
Table 2–29. FMC Connector Pin Assignments, Schematic Signal Names, and Functions (Part 2 of 7)
Board
Reference
(J10)
Schematic
Signal Name
Arria V GT
FPGA
Pin Number
I/O Standard Description