Altera Cyclone V GT FPGA Development Board - Manual (Page 43)

Chapter 2: Board Components 2–35
Components and Interfaces
September 2014 Altera Corporation Cyclone V GT FPGA Development Board
Reference Manual
To enable the SDI interface, you must switch the placement of the following resistors
listed in
Table 2–23 .
The SDI video port consists of a LMH0303 cable driver (output) and a LMH0384 cable
equalizer (input). The PHY devices from National Semiconductor interface to
single-ended 75- SMB connectors.
SDI Video Output
The cable driver supports operation at 270 Mb standard definition (SD), 1.5 Gb high
definition (HD), and 2.97 Gb dual-link HD modes. Control signals are allowed for SD
and HD modes selections, as well as device enable. The reference clock of the device is
148.5 MHz and matches the incoming signals to within 50 ppm using the UP and DN
voltage control lines to the voltage-controlled crystal oscillator (VCXO).
Table 2–24 lists the supported output standards for the SD and HD input.
f
For more information about the application circuit of the cable driver, refer to the
cable driver data sheet in
www.national.com .
Table 2–25 summarizes the SDI video output interface pin assignments, signal names,
and functions.
Table 2–23. Resistor Switching to Enable the SDI Channel
Resistor Old Placement Resistor New Placement
R41 R45
R42 R46
R47 R50
R48 R51
Table 2–24. Supported Output Standards for SD and HD Input
SD_HD Input Supported Output Standards Rise TIme
0 SMPTE 424M, SMPTE 292M Faster
1 SMPTE 259M Slower
Table 2–25. SDI Video Output Interface Pin Assignments, Schematic Signal Names, and Functions
Board
Reference (U50)
Schematic Signal Name
Cyclone V GT
Pin Number
I/O Standard Description
1 SDI_A_TX_P P4 1.5-V PCML Serial data output P
2 SDI_A_TX_N P3 1.5-V PCML Serial data output N
4 SDI_A_TX_RSET — 2.5-V Output swing set resistor
6 SDI_A_TX_EN (1) AM6 2.5-V Output driver enable
10 SDI_A_TX_SD_HDN AN5 2.5-V High-definition select
11 SDI_A_TXDRV_N — 2.5-V Serial data
12 SDI_A_TXDRV_P — 2.5-V Serial data
Note to Table 2–6 :
(1) The SDI_A_TX_EN pin has an internal pull up resistor to keep the output turned on by default.