Altera Cyclone V GT FPGA Development Board User Manual
Page 41

Chapter 2: Board Components
2–33
Components and Interfaces
September 2014
Altera Corporation
Cyclone V GT FPGA Development Board
Reference Manual
83
HSMB_DQ12
H22
2.5-V CMOS
Memory data bus
85
HSMB_DQ13
B28
2.5-V CMOS
Memory data bus
89
HSMB_DQ14
D26
2.5-V CMOS
Memory data bus
91
HSMB_DQ15
F22
2.5-V CMOS
Memory data bus
95
HSMB_CLK_OUT_P1
L22
LVDS or 2.5-V LVDS or CMOS clock out 1 or CMOS bit 36
96
HSMB_CLK_IN_P1
K25
LVDS or 2.5-V LVDS or CMOS clock in 1 or CMOS bit 37
97
HSMB_CLK_OUT_N1
K22
LVDS or 2.5-V LVDS or CMOS clock out 1 or CMOS bit 38
98
HSMB_CLK_IN_N1
J25
LVDS or 2.5-V LVDS or CMOS clock in 1 or CMOS bit 39
101
HSMB_DQ16
F27
2.5-V CMOS
Memory data bus
103
HSMB_DQ17
G23
2.5-V CMOS
Memory data bus
107
HSMB_DQ18
H23
2.5-V CMOS
Memory data bus
109
HSMB_DQ19
B31
2.5-V CMOS
Memory data bus
113
HSMB_DQ20
E28
2.5-V CMOS
Memory data bus
115
HSMB_DQ21
D29
2.5-V CMOS
Memory data bus
119
HSMB_DQ22
D30
2.5-V CMOS
Memory data bus
121
HSMB_DQ23
C32
2.5-V CMOS
Memory data bus
125
HSMB_DQ24
H26
2.5-V CMOS
Memory data bus
127
HSMB_DQ25
G25
2.5-V CMOS
Memory data bus
131
HSMB_DQ26
G28
2.5-V CMOS
Memory data bus
133
HSMB_DQ27
F25
2.5-V CMOS
Memory data bus
137
HSMB_DQ28
G29
2.5-V CMOS
Memory data bus
139
HSMB_DQ29
H24
2.5-V CMOS
Memory data bus
143
HSMB_DQ30
G24
2.5-V CMOS
Memory data bus
145
HSMB_DQ31
F30
2.5-V CMOS
Memory data bus
149
HSMB_C_P
M18
2.5-V CMOS
Memory OVLD
151
HSMB_C_N
E19
2.5-V CMOS
Memory ODT
155
HSMB_CLK_OUT_P2
F26
LVDS or 2.5-V LVDS or CMOS clock out 2 or CMOS bit 76
156
HSMB_CLK_IN_P2
J20
LVDS or 2.5-V LVDS or CMOS clock in 2 or CMOS bit 77
157
HSMB_CLK_OUT_N2
G26
LVDS or 2.5-V LVDS or CMOS clock out 2 or CMOS bit 78
158
HSMB_CLK_IN_N2
K19
LVDS or 2.5-V LVDS or CMOS clock in 2 or CMOS bit 79
48
HSMB_DM0
C27
2.5-V CMOS
Data mask
50
HSMB_A0
E23
2.5-V CMOS
Memory address bus
54
HSMB_A1
B25
2.5-V CMOS
Memory address bus
56
HSMB_A2
A28
2.5-V CMOS
Memory address bus
60
HSMB_A3
A26
2.5-V CMOS
Memory address bus
62
HSMB_A4
D21
2.5-V CMOS
Memory address bus
72
HSMB_DM1
C28
2.5-V CMOS
Memory address bus
74
HSMB_A5
C23
2.5-V CMOS
Memory address bus
78
HSMB_A6
E29
2.5-V CMOS
Memory address bus
Table 2–22. HSMC Interface Pin Assignments, Schematic Signal Names, and Functions (Part 5 of 6)
Board
Reference
Schematic Signal Name
Cyclone V GT
Pin Number
I/O Standard
Description