Altera Cyclone V GT FPGA Development Board User Manual
Page 35

Chapter 2: Board Components
2–27
Components and Interfaces
September 2014
Altera Corporation
Cyclone V GT FPGA Development Board
Reference Manual
76
ENET_LED_LINK10
—
2.5-V CMOS
10-Mb link LED
74
ENET_LED_LINK100
—
2.5-V CMOS
100-Mb link LED
73
ENET_LED_LINK1000
—
2.5-V CMOS
1000-Mb link LED
58
ENET_LED_RX
—
2.5-V CMOS
RX data active LED
69
ENET_LED_RX
—
2.5-V CMOS
RX data active LED
68
ENET_LED_TX
—
2.5-V CMOS
TX data active LED
25
ENET_MDC
AM8
2.5-V CMOS
Management bus data clock
24
ENET_MDIO
AG14
2.5-V CMOS
Management bus data
28
ENET_RESETN
AN9
2.5-V CMOS
Device reset
2
ENET_RX_CLK
AM10
2.5-V CMOS
RGMII receive clock
95
ENET_RX_D0
AK14
2.5-V CMOS
RGMII receive data bus
92
ENET_RX_D1
AL10
2.5-V CMOS
RGMII receive data bus
93
ENET_RX_D2
AJ14
2.5-V CMOS
RGMII receive data bus
91
ENET_RX_D3
AK12
2.5-V CMOS
RGMII receive data bus
94
ENET_RX_DV
AH14
2.5-V CMOS
RGMII receive data valid
11
ENET_TX_D0
AB14
2.5-V CMOS
RGMII transmit data bus
12
ENET_TX_D1
AD15
2.5-V CMOS
RGMII transmit data bus
14
ENET_TX_D2
AB15
2.5-V CMOS
RGMII transmit data bus
16
ENET_TX_D3
AB13
2.5-V CMOS
RGMII transmit data bus
9
ENET_TX_EN
AC14
2.5-V CMOS
RGMII transmit enable
55
ENET_XTAL_25MHZ
—
2.5-V CMOS
25-MHz RGMII transmit clock
29
MDI_P0
—
2.5-V CMOS
Media dependent interface
31
MDI_N0
—
2.5-V CMOS
Media dependent interface
33
MDI_P1
—
2.5-V CMOS
Media dependent interface
34
MDI_N1
—
2.5-V CMOS
Media dependent interface
39
MDI_P2
—
2.5-V CMOS
Media dependent interface
41
MDI_N2
—
2.5-V CMOS
Media dependent interface
42
MDI_P3
—
2.5-V CMOS
Media dependent interface
43
MDI_N3
—
2.5-V CMOS
Media dependent interface
Table 2–21. Ethernet PHY Pin Assignments, Signal Names and Functions (Part 2 of 2)
Board
Reference (U11)
Schematic Signal Name
Cyclone V GT
Pin Number
I/O Standard
Description