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2 module architecture, Module architecture, Figure 5-2 – AMD Geode SC1201 User Manual

Page 91: Detailed sio block diagram

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AMD Geode™ SC1200/SC1201 Processor Data Book

91

SuperI/O Module

32579B

5.2

Module Architecture

The SIO module comprises a collection of generic func-
tional blocks. Each functional block is described in detail
later in this chapter. The beginning of this chapter
describes the SIO structure and provides all device specific
information, including special implementation of generic
blocks, system interface and device configuration.

The SIO module is based on eight logical devices, the host
interface, and a central configuration register set, all built
around a central, internal 8-bit bus.

The host interface serves as a bridge between the external
ISA interface and the internal bus. It supports 8-bit I/O
read, 8-bit I/O write and 8-bit DMA transactions, as defined
in Personal Computer Bus Standard P996.

The central configuration register set supports ACPI com-
pliant PnP configuration. The configuration registers are
structured as a subset of the Plug and Play Standard Reg-
isters, defined in Appendix A of the Plug and Play ISA
Specification
Version 1.0a by Intel and Microsoft. All sys-
tem resources assigned to the functional blocks (I/O
address space, DMA channels and IRQ lines) are config-
ured in, and managed by, the central configuration register
set. In addition, some function-specific parameters are con-
figurable through this unit and distributed to the functional
blocks through special control signals.

The source of the device internal clocks is the 48 MHz
clock signal or through the 32.768 KHz crystal with an
internal frequency multiplier. RTC operates on a 32 KHz
clock.

Figure 5-2. Detailed SIO Block Diagram

SIN1

SOUT1

IRRX1/SIN

3

IR

T

X

/SOUT

3

PWUREQ

Parallel

Serial
Port 1

and Control

Registers

System

Wakeup

Port

DACK0-3
DRQ0-3

Inter

nal Bus

Host

Contro

l Signals

IRQ1-12,14-15

SIN2
SOUT2
RTS2#
DTR2#/BOUT2
CTS2

Serial

Port 2

RI

2

#

V

BA

T

V

SB

Configuration

TC

Infrared

Interface

Real-Time Clock (RTC)

CON

F

IG

CL

K

IN

MR

X1C/X1

X2C

D

[7:0]

IOCHRDY

IOWR#
IORD#

A[

1

5

:0

]

AEN

ZWS#

ALARM

ACCESS.

AB1C

AB1D

AB2C

AB2D

SD

A

T

A_IN2

ACK#

AFD#/DSTRB#

BUSY/WAIT#

ERR#

INIT#

PD[7:0]

PE

SLCT

SLIN#/ASTRB#

STB#/WRITE#

DTR#/BOUT1

Internal

Internal

Internal Signals

Internal

RI2#
DCD2#
DSR2#

bus 1

ACCESS.

bus 2

Signal

Communication

Port/Serial Port 3

Signals

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