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Figure 9-18, Pci input timing measurement conditions, Figure 9-19 – AMD Geode SC1201 User Manual

Page 393: Pci reset timing, Figure 9-19)

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AMD Geode™ SC1200/SC1201 Processor Data Book

393

Electrical Specifications

32579B

Figure 9-18. PCI Input Timing Measurement Conditions

Figure 9-19. PCI Reset Timing

V

TEST

V

TEST

Input Valid

t

SU

t

H

V

TEST

V

MAX

V

TH

V

TL

PCICLK

Input

V

TH

V

TL

) (

100 ms (typ)

) (

t

RST

t

RST-CLK

t

RST-OFF

TRI_STATE

PCI

Signals

PCIRST#

PCICLK

POWER

POR#

t

FAIL

V

IO

Note:

The value of t

FAIL

is 500 ns (maximum) from the power rail which exceeds specified tolerance by more than

500 mV.

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