B&K Precision MDL Series - Programming Manual User Manual
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polling causes bit B6 (RQS) to reset. Serial polling is discussed in more detail later in this section
entitled “Serial Poll and SRQ.” Any of the following operations clear all bits of the Status Byte Register:
•
Cycling power
•
Sending the *CLS common command
Note: The MAV bit may or may not be cleared.
Service request enable register
This register is programmed by you and serves as a mask for the Status Summary Message bits (B0, B2,
B3, B4, B5, and B7) of the Status Byte Register. When masked, a set summary bit in the Status Byte
Register cannot set bit B6 (MSS/RQS) of the Status Byte Register. Conversely, when unmasked, a set
summary bit in the Status Byte Register sets bit B6.
A Status Summary Message bit in the Status Byte Register is masked when the corresponding bit in the
Service Request Enable Register is cleared (0). When the masked summary bit in the Status Byte
Register sets, it is ANDed with the corresponding cleared bit in the Service Request Enable Register.
The logic “1” output of the AND gate is applied to the input of the OR gate and, thus, sets the MSS/RQS
bit in the Status Byte Register. The individual bits of the Service Request Enable Register can be set or
cleared by using the following common command:
*SRE
To read the Service Request Enable Register, use the *SRE? query command. The Service Request
Enable Register clears when power is cycled or a parameter (n) value of zero is sent with the *SRE
command (*SRE 0).
Serial poll and SRQ
Any enabled event summary bit that goes from 0 to 1 will set RQS and generate a service request
(SRQ). In your test program, you can periodically read the Status Byte Register to check if a service
request (SRQ) has occurred and what caused it. If an SRQ occurs, the program can, for example, branch
to an appropriate subroutine that will service the request. Typically, service requests (SRQs) are
managed by the serial poll sequence of the electronic load. If an SRQ does not occur, bit B6 (RQS) of
the Status Byte Register will remain cleared and the program will simply proceed normally after the
serial poll is performed. If an SRQ does occur, bit B6 of the Status Byte Register will set and the
program can branch to a service subroutine when the SRQ is detected by the serial poll. The serial poll
automatically resets RQS of the Status Byte Register. This allows subsequent serial polls to monitor bit
B6 for an SRQ occurrence generated by other event types. After a serial poll, the same event can cause
another SRQ, even if the event register that caused the first SRQ has not been cleared.
A serial poll clears RQS but does not clear MSS. The MSS bit stays set until all Status Byte event
summary bits are cleared.