Transmit system side ac timing figure 16–8, Transmit line interface side ac timing figure 16–9 – Rainbow Electronics DS2152 User Manual
Page 76
DS2152
031897 76/79
TRANSMIT SYSTEM SIDE AC TIMING Figure 16–8
t
R
t
F
t
SP
t
SL
t
SH
t
SU
t
D3
t
HD
t
D3
t
PW
t
SU
TSYSCLK
TSER
TCHCLK
TCHBLK
TSSYNC
NOTES:
1. TSER is only sampled on the falling edge of TSYSCLK when the transmit side elastic store is enabled.
2. TCHCLK and TCHBLK are synchronous with TSYSCLK when the transmit side elastic store is enabled.
TRANSMIT LINE INTERFACE SIDE AC TIMING Figure 16–9
t
R
t
F
t
LP
t
LL
t
LH
t
SU
TCLKI
t
DD
TCLKO
TPOSI, TNEGI
t
HD
TPOSO, TNEGO
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