Rainbow Electronics DS2152 - Manual (Page 65)

DS2152
031897 65/79
TRANSMIT SIDE 2.048 MHz BOUNDARY TIMING(WITH ELASTIC STORE
ENABLED) Figure 15–10
TSYSCLK
A
CHANNEL 1 CHANNEL 31
LSB MSB
CHANNEL 32
ЙЙ
ЙЙ
ЙЙ
ЙЙ
ЙЙ
ЙЙ
ЙЙ
ЙЙ
ЙЙ
ЙЙ
ЙЙ
ЙЙ
ЙЙЙ
ЙЙЙ
ЙЙ
ЙЙ
ЙЙ
ЙЙ
ЙЙ
ЙЙ
ЙЙ
ЙЙ
ЙЙ
ЙЙ
TSER 1
TSSYNC
TSIG
TCHCLK
TCHBLK 2, 3
ЙЙ ЙЙ ЙЙ ЙЙ
LSB F 4
B C/A D/B A B C/A D/B
CHANNEL 1 CHANNEL 31 CHANNEL 32
NOTES:
1. TSER data in channels 1, 5, 9, 13, 17, 21, 25, and 29 is ignored.
2. TCHBLK is programmed to block channel 31 (if the TPCSI bit is set, then the signaling data at TSIG will be
ignored).
3. TCHBLK is forced to one in the same channels as TSER is ignored (see Note 1).
4. The F–bit position for the T1 frame is sampled and passed through the transmit side elastic store (normally the
transmit side formatter overwrites the F–bit position unless the formatter is programmed to pass–through the
F–bit position).
5. TCHCLK does not transition high in the channel in which the data at TSER is ignored (see note 1).