Rainbow Electronics DS2152 - Manual (Page 48)

DS2152
031897 48/79
TNF FIMR.1 Transmit FIFO Not Full.
0 = interrupt masked
1 = interrupt enabled
TMEND FIMR.0 Transmit Message End.
0 = interrupt masked
1 = interrupt enabled
RPRM: RECEIVE PRM REGISTER (Address=03 Hex)
(MSB) (LSB)
RABT RCRCE ROVR RVM REMPTY POK CBYTE OBYTE
SYMBOL POSITION NAME AND DESCRIPTION
RABT RPRM.7 Abort Sequence Detected. Set whenever the HDLC controller sees 7 or
more ones in a row.
RCRCE RPRM.6 CRC Error. Set when the CRC checksum is in error.
ROVR RPRM.5 Overrun. Set when the HDLC controller has attempted to write a byte into
an already full receive FIFO.
RVM RPRM.4 Valid Message. Set when the HDLC controller has detected and checked
a complete HDLC packet.
REMPTY RPRM.3 Empty. A real–time bit that is set high when the receive FIFO is empty.
POK RPRM.2 Packet OK. Set when the byte available for reading in the receive FIFO at
RFDL is the last byte of a valid message (and hence no abort was seen, no
overrun occurred, and the CRC was correct).
CBYTE RPRM.1 Closing Byte. Set when the byte available for reading in the receive FIFO
at RFDL is the last byte of a message (whether the message was valid or
not).
OBYTE RPRM.0 Opening Byte. Set when the byte available for reading in the receive FIFO
at RFDL is the first byte of a message.
NOTE:
The RABT, RCRCE, ROVR, and RVM bits are latched and will be cleared when read.
RBOC: RECEIVE BOC REGISTER (Address=04 Hex)
(MSB) (LSB)
LBD BD BOC5 BOC4 BOC3 BOC2 BOC1 BOC0
SYMBOL POSITION NAME AND DESCRIPTION
LBD RBOC.7 Latched BOC Detected. A latched version of the BD status bit (RBOC.6).
Will be cleared when read.
BD RBOC.6 BOC Detected. A real–time bit that is set high when the BOC detector is
presently seeing a valid sequence and set low when no BOC is currently
being detected.