Rainbow Electronics DS2152 - Manual (Page 50)

DS2152
031897 50/79
TFULL TPRM.1 Transmit FIFO Full. A real–time bit that is set high when the FIFO is full.
UDR TPRM.0 Underrun. Set when the transmit FIFO unwantedly empties out and an
abort is automatically sent.
NOTE:
The UDR bit is latched and will be cleared when read.
TBOC: TRANSMIT BOC REGISTER (Address=07 Hex)
(MSB) (LSB)
SBOC HBEN BOC5 BOC4 BOC3 BOC2 BOC1 BOC0
SYMBOL POSITION NAME AND DESCRIPTION
SBOC TBOC.7 Send BOC. Rising edge triggered. Must be transitioned from a 0 to a 1
transmit the BOC code placed in the BOC0 to BOC5 bits instead of data
from the HDLC controller.
HBEN TBOC.6 Transmit HDLC & BOC Controller Enable.
0 = source FDL data from the TLINK pin
1 = source FDL data from the onboard HDLC and BOC controller
BOC5 TBOC.5 BOC Bit 5. Last bit transmitted of the 6–bit codeword.
BOC4 TBOC.4 BOC Bit 4.
BOC3 TBOC.3 BOC Bit 3.
BOC2 TBOC.2 BOC Bit 2.
BOC1 TBOC.1 BOC Bit 1.
BOC0 TBOC.0 BOC Bit 0. First bit transmitted of the 6–bit codeword.
TFFR: TRANSMIT FDL FIFO REGISTER (Address=08 Hex)
(MSB) (LSB)
FDL7 FDL6 FDL5 FDL4 FDL3 FDL2 FDL1 FDL0
SYMBOL POSITION NAME AND DESCRIPTION
FDL7 TFFR.7 FDL Data Bit 7. MSB of a HDLC packet data byte.
FDL6 TFFR.6 FDL Data Bit 6.
FDL5 TFFR.5 FDL Data Bit 5.
FDL4 TFFR.4 FDL Data Bit 4.
FDL3 TFFR.3 FDL Data Bit 3.
FDL2 TFFR.2 FDL Data Bit 2.
FDL1 TFFR.1 FDL Data Bit 1.
FDL0 TFFR.0 FDL Data Bit 0. LSB of a HDLC packet data byte.