Texas Instruments TMS320C67X/C67X+ DSP - Manual (Page 82)

Resource Constraints
Instruction Set 3-22 SPRU733
3.7.4 Constraints on Loads and Stores
Load and store instructions can use an address pointer from one register file
while loading to or storing from the other register file. Two load and store
instructions using a destination/source from the same register file cannot be
issued in the same execute packet. The address register must be on the same
side as the .D unit used.
The following execute packet is invalid:
LDW.D1 *A0,A1 ; \ .D2 unit must use the address
|| LDW.D2 *A2,B2 ; / register from the B register file
The following execute packet is valid:
LDW.D1 *A0,A1 ; \ Address registers from correct
|| LDW.D2 *B0,B2 ; / register files
Two loads and/or stores loading to and/or storing from the same register file
cannot be issued in the same execute packet.
The following execute packet is invalid:
LDW.D1 *A4,A5 ; \ Loading to and storing from the
|| STW.D2 A6,*B4 ; / same register file
The following execute packets are valid:
LDW.D1 *A4,B5 ; \ Loading to, and storing from
|| STW.D2 A6,*B4 ; / different register files
LDW.D1 *A0,B2 ; \ Loading to
|| LDW.D2 *B0,A1 ; / different register files