Texas Instruments TMS320C67X/C67X+ DSP - Manual (Page 346)

Pipeline Execution of Instruction Types
Pipeline 4-14 SPRU733
Table 4−2. Execution Stage Length Description for Each Instruction Type (Continued)
Instruction Type
Execution
phases
ADDDP/SUBDP MPYI MPYID MPYDP
E1 Read lower sources
and start computation Read sources and
start computation Read sources and
start computation Read lower sources
and start computation
E2 Read upper sources
and continue
computation Read sources and
continue computation Read sources and
continue computation Read lower src1 and
upper src2 and
continue computation
E3 Continue computation Read sources and
continue computation
Read sources and
continue computation Read lower src2 and
upper src1 and
continue computation
E4 Continue computation Read sources and
continue computation
Read sources and
continue computation Read upper sources
and continue
computation
E5 Continue computation Continue computation Continue computation Continue computation
E6 Compute the lower
results and write to
register Continue computation Continue computation Continue computation
E7 Compute the upper
results and write to
register Continue computation Continue computation Continue computation
E8 Continue computation Continue computation Continue computation
E9 Complete computa-
tion and write results
to register Continue computation
and write lower
results to register Continue computation
and write lower
results to register
E10 Complete computa-
tion and write upper
results to register Complete computa-
tion and write upper
results to register
Delay slots 6 8 9 9
Functional
unit latency 2 4 4 4
Notes: 1) This table assumes that the condition for each instruction is evaluated as true. If the condition is evaluated as
false, the instruction does not write any results or have any pipeline operation after E1.
2) NOP is not shown and has no operation in any of the execution phases.