Texas Instruments TMS320C67X/C67X+ DSP User Manual
Page 229
Multiply Single-Precision Value x Double-Precision Value (C67x+ CPU)
MPYSPDP
3-169
Instruction Set
SPRU733
Pipeline
Stage
E1
E2
E3
E4
E5
E6
E7
Read
src1
src2_l
src1
src2_h
Written
dst_l
dst_h
Unit in use
.M
.M
The low half of the result is written out one cycle earlier than the high half. If
dst is used as the source for the ADDDP, CMPEQDP, CMPLTDP, CMPGTDP,
MPYDP, MPYSPDP, MPYSP2DP, or SUBDP instruction, the number of delay
slots can be reduced by one, because these instructions read the lower word
of the DP source one cycle before the upper word of the DP source.
Instruction Type
MPYSPDP
Delay Slots
6
Functional Unit
Latency
3
See Also
MPY, MPYDP, MPYSP, MPYSP2DP
Pipeline