Texas Instruments TMS320C67X/C67X+ DSP - Manual (Page 198)

LDW Load Word From Memory With a 5-Bit Unsigned Constant Offset or Register Offset
3-138 Instruction Set SPRU733
Example 1 LDW .D1 *A10,B1
Before LDW 1 cycle after LDW 5 cycles after LDW
B1 0000 0000h B1 0000 0000h B1 21F3 1996h
A10 0000 0100h A10 0000 0100h A10 0000 0100h
mem 100h 21F3 1996h mem 100h 21F3 1996h mem 100h 21F3 1996h
Example 2 LDW .D1 *A4++[1],A6
Before LDW 1 cycle after LDW 5 cycles after LDW
A4 0000 0100h A4 0000 0104h A4 0000 0104h
A6 1234 4321h A6 1234 4321h A6 0798 F25Ah
AMR 0000 0000h AMR 0000 0000h AMR 0000 0000h
mem 100h 0798 F25Ah mem 100h 0798 F25Ah mem 100h 0798 F25Ah
mem 104h 1970 19F3h mem 104h 1970 19F3h mem 104h 1970 19F3h
Example 3 LDW .D1 *++A4[1],A6
Before LDW 1 cycle after LDW 5 cycles after LDW
A4 0000 0100h A4 0000 0104h A4 0000 0104h
A6 1234 5678h A6 1234 5678h A6 0217 6991h
AMR 0000 0000h 0000 0000h AMR 0000 0000h
mem 104h 0217 6991h mem 104h 0217 6991h mem 104h 0217 6991h